Patents by Inventor Jilian Zhu

Jilian Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8483317
    Abstract: A method of controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device includes the steps of generating a complex representation of the value developed by the equalizer and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a sampling error estimate. The sampling error estimate is used to adjust the sampling frequency and sampling phase of the sampling device.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: July 9, 2013
    Assignee: Entropic Communications, Inc.
    Inventors: Jilian Zhu, Richard W. Citta, Scott M. Lopresto, David A. Willming, Shidong Chen
  • Patent number: 7995648
    Abstract: A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: August 9, 2011
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Jingsong Xia, Shidong Chen, Richard W. Citta, Gopalan Krishnamurthy, Scott M. Lopresto, David A. Willming, Xiaojun Yang, Jilian Zhu
  • Patent number: 7599433
    Abstract: A method of controlling a feedforward filter of an equalizer includes the steps of generating a complex representation of an output of the feedforward filter and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a phase error estimate. A phase correction value is generated based on the phase error estimate and used to adjust the phase of the output of the feedforward filter.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: October 6, 2009
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Jilian Zhu, Scott M. Lopresto, David A. Willming, Shidong Chen, Gopalan Krishnamurthy
  • Patent number: 7545888
    Abstract: A method of controlling a digital demodulator (922) coupled to an equalizer (930) includes the steps of generating an equalizer value (930A), filtering (944) the equalizer value (930A) to obtain a post filter output, subtracting the equalizer output signal (930C) from the decoded data (930D) and generating an error value (924A). The post filter output is correlated (948) with the error value (924A) to obtain a correlated value (74A). A control signal is developed from the correlated value and is used to adjust the digital demodulator (922).
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: June 9, 2009
    Assignee: Micronas Semiconductors, Inc.
    Inventors: Jilian Zhu, Richard W. Citta, Scott M. Lopresto, Shidong Chen
  • Patent number: 7376181
    Abstract: A DFE comprises a trellis decoder and a plurality of sub-filter pipelines. Each of the plurality of sub-filter pipelines is fed intermediate decoded symbols of one of the stages in a trace-back chain of a current decoding bank. The DFE output is formed by summing the plurality of sub-filter pipelines.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: May 20, 2008
    Assignee: Micronas Semiconductors, Inc.
    Inventors: Shidong Chen, Jilian Zhu, Xiaojun Yang
  • Publication number: 20080107168
    Abstract: A digital receiver for processing a signal received from a channel includes a digital demodulator and an equalizer coupled to the digital demodulator. The equalizer includes a feedforward filter and a decision feedback equalizer (DFE), wherein the feedforward filter includes a plurality of feedforward filter taps. Coefficients are associated with the plurality of feedforward filter taps and the values of all of the coefficients associated with the plurality of feedforward filter taps are dynamically determined.
    Type: Application
    Filed: April 8, 2005
    Publication date: May 8, 2008
    Applicant: MICRONAS SEMICONDUCTORS, INC.
    Inventors: Jingsong Xia, Shidong Chen, Richard W. Citta, Gopalan Krishnamurthy, Scott M. Lopresto, David A. Willming, Xiaojun Yang, Jilian Zhu
  • Publication number: 20080043884
    Abstract: A method of controlling a digital demodulator (922) coupled to an equalizer (930) includes the steps of generating an equalizer value (930A), filtering (944) the equalizer value (930A) to obtain a post filter output, subtracting the equalizer output signal (930C) from the decoded data (930D) and generating an error value (924A). The post filer output is correlated (948) with the error value (924A) to obtain a correlated value (74A). A control signal is developed from the correlated value and is used to adjust the digital demodulator (922).
    Type: Application
    Filed: April 8, 2005
    Publication date: February 21, 2008
    Inventors: Jilian Zhu, Richard Citta, Scott Lopresto, Shidong Chen
  • Patent number: 7321642
    Abstract: A digital equalizer for interpreting a digital signal including convolutionally encoded symbols and synchronization symbols outside the convolutional code comprises a combined trellis encoder and DFE. The synchronization symbols are re-inserted into the input of the DFE in order to restore time domain continuity created by removal of the synchronization symbols.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: January 22, 2008
    Assignee: Micronas Semiconductors, Inc.
    Inventors: Shidong Chen, Jilian Zhu, Xiaojun Yang
  • Publication number: 20080008280
    Abstract: A method of controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device includes the steps of generating a complex representation of the value developed by the equalizer and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a sampling error estimate. The sampling error estimate is used to adjust the sampling frequency and sampling phase of the sampling device.
    Type: Application
    Filed: April 8, 2005
    Publication date: January 10, 2008
    Applicant: MICRONAS SEMICONDUCTORS, INC.
    Inventors: Jilian Zhu, Richard Citta, Scott Lopresto, David Willming, Shidong Chen
  • Publication number: 20070201544
    Abstract: A method of controlling a feedforward filter of an equalizer includes the steps of generating a complex representation of an output of the feedforward filter and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a phase error estimate. A phase correction value is generated based on the phase error estimate and used to adjust the phase of the output of the feedforward filter.
    Type: Application
    Filed: April 8, 2005
    Publication date: August 30, 2007
    Inventors: Jilian Zhu, Scott Lopresto, David Willming, Shidong Chen, Gopalan Krishnamurthy
  • Publication number: 20040013191
    Abstract: A DFE comprises a trellis decoder and a plurality of sub-filter pipelines. Each of the plurality of sub-filter pipelines is fed intermediate decoded symbols of one of the stages in a trace-back chain of a current decoding bank. The DFE output is formed by summing the plurality of sub-filter pipelines.
    Type: Application
    Filed: April 4, 2003
    Publication date: January 22, 2004
    Inventors: Shidong Chen, Jilian Zhu, Xiaojun Yang
  • Publication number: 20030214976
    Abstract: A digital equalizer for interpreting a digital signal including convolutionally encoded symbols and synchronization symbols outside the convolutional code comprises a combined trellis encoder and DFE. The synchronization symbols are re-inserted into the input of the DFE in order to restore time domain continuity created by removal of the synchronization symbols.
    Type: Application
    Filed: April 4, 2003
    Publication date: November 20, 2003
    Inventors: Shidong Chen, Jilian Zhu, Xiaojun Yang