Patents by Inventor Jill A. Thomas

Jill A. Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7216194
    Abstract: Methods and systems for improving delayed read handling in a loop of delayed commands among a larger set of commands in a queue of commands are disclosed. In general, when commands in a delayed loop are completed out of order, “holes” are left in the command queue. Skipping over such “holes” consumes multiple clock cycles before another command can be issued, as each “hole” must be examined first in order to determine that it no longer contains a valid read command. A loop of delayed read commands can thus be created from among a larger set of commands in a queue of commands with each command entry having a pointer to the next valid command. Valid delayed read commands in the loop of commands can then be processed by automatically advancing between any two valid delayed read commands among the loop of commands. In this manner, the time to advance between any two commands in the delayed read loop is constant and PCI read performance thereof can be dramatically improved.
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: May 8, 2007
    Assignee: LSI Logic Corporation
    Inventors: Richard L. Solomon, Jill A. Thomas
  • Patent number: 6941427
    Abstract: A method and apparatus for traversing a queue of commands through part or all of the queue by selecting only the commands that need to be reissued. Commands to be reissued are labeled or designated as valid. The method may be practiced by setting a next valid address pointer in all queue entries. Queue traversal may be forward, backward, or bi-directional.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: September 6, 2005
    Assignee: LSI Logic Corporation
    Inventors: Richard L. Solomon, Jill A. Thomas, Robert E. Ward
  • Publication number: 20040205282
    Abstract: Methods and systems for improving delayed read handling in a loop of delayed commands among a larger set of commands in a queue of commands are disclosed. In general, when commands in a delayed loop are completed out of order, “holes” are left in the command queue. Skipping over such “holes” consumes multiple clock cycles before another command can be issued, as each “hole” must be examined first in order to determine that it no longer contains a valid read command. A loop of delayed read commands can thus be created from among a larger set of commands in a queue of commands with each command entry having a pointer to the next valid command. Valid delayed read commands in the loop of commands can then be processed by automatically advancing between any two valid delayed read commands among the loop of commands. In this manner, the time to advance between any two commands in the delayed read loop is constant and PCI read performance thereof can be dramatically improved.
    Type: Application
    Filed: April 8, 2003
    Publication date: October 14, 2004
    Inventors: Richard L. Solomon, Jill A. Thomas
  • Publication number: 20040123055
    Abstract: A method and apparatus for traversing a queue of commands through part or all of the queue by selecting only the commands that need to be reissued. Commands to be reissued are labeled or designated as valid. The method may be practiced by setting a next valid address pointer in all queue entries. Queue traversal may be forward, backward, or bi-directional.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Inventors: Richard L. Solomon, Jill A. Thomas, Robert E. Ward