Patents by Inventor Jill Boyce
Jill Boyce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12367654Abstract: Devices and techniques related to implementing patch based video coding for machines are discussed. Such patch based video coding includes detecting regions of interest in a frame of video, extracting the detected regions of interest to one or more atlases absent the frame at a resolution not less than the resolution of the regions of interest, and encoding the one or more atlases to a bitstream.Type: GrantFiled: April 15, 2021Date of Patent: July 22, 2025Assignee: Intel CorporationInventors: Jill Boyce, Palanivel Guruva Reddiar, Praveen Prasad
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Patent number: 12361600Abstract: Embodiments described herein provided for an instruction and associated logic to enable a processing resource including a tensor accelerator to perform optimized computation of sparse submatrix operations. One embodiment provides a parallel processor comprising a processing cluster coupled with the cache memory. The processing cluster includes a plurality of multiprocessors coupled with a data interconnect, where a multiprocessor of the plurality of multiprocessors includes a tensor core configured to load tensor data and metadata associated with the tensor data from the cache memory, wherein the metadata indicates a first numerical transform applied to the tensor data, perform an inverse transform of the first numerical transform, perform a tensor operation on the tensor data after the inverse transform is performed, and write output of the tensor operation to a memory coupled with the processing cluster.Type: GrantFiled: May 23, 2023Date of Patent: July 15, 2025Assignee: Intel CorporationInventors: Abhishek R. Appu, Prasoonkumar Surti, Jill Boyce, Subramaniam Maiyuran, Michael Apodaca, Adam T. Lake, James Holland, Vasanth Ranganathan, Altug Koker, Lidong Xu, Nikos Kaburlasos
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Patent number: 12301869Abstract: Techniques related to immersive video coding are discussed and include immersive video sequences and output units for random access to the immersive video, coding improvements for camera parameters coding, and coding efficiency improvements for atlas parameters.Type: GrantFiled: May 14, 2020Date of Patent: May 13, 2025Assignee: Intel CorporationInventor: Jill Boyce
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Publication number: 20250150569Abstract: Embodiments are generally directed to selective packing of patches for immersive video. An embodiment of a processing system includes one or more processor cores; and a memory to store data for immersive video, the data including a plurality of patches for multiple projection directions. The system is to select the patches for packing, the selection of the patches based at least in part on which of the multiple projection directions is associated with each of the patches. The system is to encode the patches into one or more coded pictures according to the selection of the patches.Type: ApplicationFiled: December 27, 2024Publication date: May 8, 2025Applicant: Intel CorporationInventors: Eyal Ruhm, Jill Boyce, Asaf J. Shenberg
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Patent number: 12278995Abstract: Methods, apparatus, systems and articles of manufacture to sample enabled views per atlas in immersive video are disclosed. An example apparatus includes an interface to obtain a bitstream corresponding to an immersive video; a bitstream analyzer to determine that metadata corresponding to an atlas of the bitstream identifies that at least part of a view of interest corresponds to the atlas, the metadata included in the bitstream; and a filter to generate a filtered bitstream by removing atlases that do not identify at least part of a view of interest from the bitstream, the interface to provide the filtered bitstream to a decoder.Type: GrantFiled: March 26, 2021Date of Patent: April 15, 2025Assignee: Intel CorporationInventors: Jill Boyce, Basel Salahieh
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Patent number: 12230002Abstract: Methods, apparatus, systems and articles of manufacture for object-based volumetric video coding are disclosed. An example apparatus disclosed herein includes a point annotator to receive point cloud data associated with an object and annotate points of the point cloud data with an object identifier of the object. The disclosed example apparatus also includes a projector to project the point cloud data onto projection planes to produce texture images and geometry images. The disclosed example apparatus further includes a patch generator to generate a patch based on the object identifier, the patch including the texture images and the geometry images of the object, the patch associated with the object identifier of the object. The disclosed example apparatus also includes an atlas generator to generate an atlas to include in encoded video data, the atlas including the patch.Type: GrantFiled: September 30, 2020Date of Patent: February 18, 2025Assignee: Intel CorporationInventors: Basel Salahieh, Fai Yeung, Jill Boyce
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Patent number: 12229867Abstract: One embodiment provides a graphics processor comprising a block of execution resources, a cache memory, a cache memory prefetcher, and circuitry including a programmable neural network unit, the programmable neural network unit comprising a network hardware block including circuitry to perform neural network operations and activation operations for a layer of a neural network, the programmable neural network unit addressable by cores within the block of graphics cores and the neural network hardware block configured to perform operations associated with a neural network configured to determine a prefetch pattern for the cache memory prefetcher.Type: GrantFiled: May 1, 2023Date of Patent: February 18, 2025Assignee: Intel CorporationInventors: Hugues Labbe, Darrel Palke, Sherine Abdelhak, Jill Boyce, Varghese George, Scott Janus, Adam Lake, Zhijun Lei, Zhengmin Li, Mike MacPherson, Carl Marshall, Selvakumar Panneer, Prasoonkumar Surti, Karthik Veeramani, Deepak Vembar, Vallabhajosyula Srinivasa Somayazulu
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Publication number: 20250055987Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.Type: ApplicationFiled: August 22, 2024Publication date: February 13, 2025Applicant: Intel CorporationInventors: Brinda Ganesh, Nilesh Jain, Sumit Mohan, Faouzi Kossentini, Jill Boyce, James Holland, Zhijun Lei, Chekib Nouira, Foued Ben Amara, Hassene Tmar, Sebastian Possos, Craig Hurst
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Patent number: 12219115Abstract: Embodiments are generally directed to selective packing of patches for immersive video. An embodiment of a processing system includes one or more processor cores; and a memory to store data for immersive video, the data including a plurality of patches for multiple projection directions. The system is select the patches for packing, the selection of the patches based at least in part on which of the multiple projection directions is associated with each of the patches. The system is to encode the patches into one or more coded pictures according to the selection of the patches.Type: GrantFiled: November 9, 2023Date of Patent: February 4, 2025Assignee: Intel CorporationInventors: Eyal Ruhm, Jill Boyce, Asaf J. Shenberg
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Patent number: 12219158Abstract: A mechanism is described for facilitating defining of interoperability signaling and conformance points for the PCC standard in computing environments. A computing device of embodiments, as described herein, includes a decoder to decode a compressed bitstream of video data representing a point cloud, point cloud reconstructor circuitry to reconstruct a point cloud from the decoded patch video data, a syntax element parser to receive at least one syntax element representing interoperability signaling in the compressed bitstream to indicate the number of points in one or more pictures of the video data, and processing hardware to determine if the number of points in the one or more pictures of the compressed bitstream is within the conformance limits of the point cloud reconstructor circuitry.Type: GrantFiled: May 29, 2024Date of Patent: February 4, 2025Assignee: Intel CorporationInventor: Jill Boyce
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Patent number: 12190118Abstract: Embodiments described herein provide an apparatus comprising a plurality of processing resources including a first processing resource and a second processing resource, a memory communicatively coupled to the first processing resource and the second processing resource, and a processor to receive data dependencies for one or more tasks comprising one or more producer tasks executing on the first processing resource and one or more consumer tasks executing on the second processing resource and move a data output from one or more producer tasks executing on the first processing resource to a cache memory communicatively coupled to the second processing resource. Other embodiments may be described and claimed.Type: GrantFiled: June 22, 2023Date of Patent: January 7, 2025Assignee: INTEL CORPORATIONInventors: Christopher J. Hughes, Prasoonkumar Surti, Guei-Yuan Lueh, Adam T. Lake, Jill Boyce, Subramaniam Maiyuran, Lidong Xu, James M. Holland, Vasanth Ranganathan, Nikos Kaburlasos, Altug Koker, Abhishek R. Appu
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Patent number: 12192478Abstract: An example apparatus for adaptively encoding video frames includes a network analyzer to predict an instant bitrate based on channel throughput feedback received from a network. The apparatus also includes a content analyzer to generate ladder info based on a received frame. The apparatus further includes an adaptive decision executer to determine a frame rate, a video resolution, and a target frame size based on the predicted instant bitrate and the ladder outputs. The apparatus further includes an encoder to encode the frame based on the frame rate, the video resolution, and the target frame size.Type: GrantFiled: November 14, 2019Date of Patent: January 7, 2025Assignee: INTEL CORPORATIONInventors: Yunbiao Lin, Changliang Wang, Ximin Zhang, Fan He, Jill Boyce, Sri Ranjan Srikantam
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Publication number: 20240354889Abstract: A mechanism is described for facilitating hemisphere cube map projection format imaging environments, according to one embodiment. A method of embodiments, as described herein, includes capturing, by a camera coupled to one or more processors, an image having image content, wherein the image content being represented by the image is omnidirectional such that the image content is mapped on a sphere while representing less than the sphere; mapping the image to a cubic representation based on six faces of a cube, wherein one or more of the six faces are classified as inactive regions such that they remain unoccupied or partially occupied; and arranging, based on the cubic representation, the six faces in a compact representation by avoiding inclusion of the inactive regions.Type: ApplicationFiled: June 28, 2024Publication date: October 24, 2024Inventors: Jill Boyce, Maxym Dmytrychenko
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Publication number: 20240348806Abstract: A mechanism is described for facilitating defining of interoperability signaling and conformance points for the PCC standard in computing environments. A computing device of embodiments, as described herein, includes a decoder to decode a compressed bitstream of video data representing a point cloud, point cloud reconstructor circuitry to reconstruct a point cloud from the decoded patch video data, a syntax element parser to receive at least one syntax element representing interoperability signaling in the compressed bitstream to indicate the number of points in one or more pictures of the video data, and processing hardware to determine if the number of points in the one or more pictures of the compressed bitstream is within the conformance limits of the point cloud reconstructor circuitry.Type: ApplicationFiled: May 29, 2024Publication date: October 17, 2024Inventor: Jill Boyce
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Publication number: 20240323422Abstract: Disclosed examples populate a supplemental enhancement information (SEI) message with a value corresponding to a number of subpictures of a video sequence; populate a level indicator in the SEI message; populate a subpicture identifier; populate the subpicture identifier in a slice header, and cause the SEI message and the slice header to be included in a video bitstream.Type: ApplicationFiled: May 31, 2024Publication date: September 26, 2024Inventors: Jill Boyce, Lidong Xu
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Patent number: 12101475Abstract: Techniques related to distributing the video encoding processing of an input video across hardware and software systems. Such techniques include evaluating the content of the video and determine whether or the encoding operation is best to be done on the hardware system only, software system only or a hybrid hardware and software system.Type: GrantFiled: December 18, 2020Date of Patent: September 24, 2024Assignee: Intel CorporationInventors: Brinda Ganesh, Nilesh Jain, Sumit Mohan, Faouzi Kossentini, Jill Boyce, James Holland, Zhijun Lei, Chekib Nouira, Foued Ben Amara, Hassene Tmar, Sebastian Possos, Craig Hurst
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Patent number: 12101498Abstract: Embodiments of a video codec may include technology to derive a conformance point for a sub-region of coded pictures in a coded video sequence in the video data, group any combination of sub-pictures that form a rectangular region into a sub-picture set, and/or derive a level indicator corresponding to a sub-picture based on a level of the coded video sequence and a relative size of the coded picture and the sub-picture set. Other embodiments are disclosed and claimed.Type: GrantFiled: June 23, 2020Date of Patent: September 24, 2024Assignee: Intel CorporationInventors: Jill Boyce, Lidong Xu
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Patent number: 12069302Abstract: Methods, apparatus, systems and articles of manufacture for texture based immersive video coding are disclosed. An example apparatus includes a correspondence labeler to (i) identify first unique pixels and first corresponding pixels included in a plurality of pixels of a first view and (ii) identify second unique pixels and second corresponding pixels included in a plurality of pixels of a second view; a correspondence patch packer to (i) compare adjacent pixels in the first view and (ii) identify a first patch of unique pixels and a second patch of corresponding pixels based on the comparison of the adjacent pixels and the correspondence relationships, the second patch of corresponding pixels tagged with a correspondence list identifying corresponding patches in the second view; and an atlas generator to generate at least one atlas to include in encoded video data, the encoded video data not including depth maps.Type: GrantFiled: December 23, 2020Date of Patent: August 20, 2024Assignee: Intel CorporationInventors: Jill Boyce, Basel Salahieh
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Patent number: 12063378Abstract: A mechanism is described for facilitating defining of interoperability signaling and conformance points for the PCC standard in computing environments. A computing device of embodiments, as described herein, includes a decoder to decode a compressed bitstream of video data representing a point cloud, point cloud reconstructor circuitry to reconstruct a point cloud from the decoded patch video data, a syntax element parser to receive at least one syntax element representing interoperability signaling in the compressed bitstream to indicate the number of points in one or more pictures of the video data, and processing hardware to determine if the number of points in the one or more pictures of the compressed bitstream is within the conformance limits of the point cloud reconstructor circuitry.Type: GrantFiled: September 13, 2023Date of Patent: August 13, 2024Assignee: Intel CorporationInventor: Jill Boyce
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Patent number: 12056842Abstract: A mechanism is described for facilitating hemisphere cube map projection format imaging environments, according to one embodiment. A method of embodiments, as described herein, includes capturing, by a camera coupled to one or more processors, an image having image content, wherein the image content being represented by the image is omnidirectional such that the image content is mapped on a sphere while representing less than the sphere; mapping the image to a cubic representation based on six faces of a cube, wherein one or more of the six faces are classified as inactive regions such that they remain unoccupied or partially occupied; and arranging, based on the cubic representation, the six faces in a compact representation by avoiding inclusion of the inactive regions.Type: GrantFiled: August 21, 2023Date of Patent: August 6, 2024Assignee: Intel CorporationInventors: Jill Boyce, Maxym Dmytrychenko