Patents by Inventor Jim Cullum

Jim Cullum has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory architecture
    Patent number: 8897052
    Abstract: A DDR SDRAM where unidirectional row logic is associated with and connected to a single memory array instead of being associated with and connected to multiple memory arrays. The unidirectional row logic is located in the outward periphery of its associated array, but is not within a throat region between two arrays. The location of the row logic allows the throat region to include more bidirectional IO circuitry and signal lines servicing two arrays, which increases the performance of the SDRAM. In addition, separate power bussing is employed for the memory arrays and IO circuitry. This prevents noise from the arrays from affecting the IO circuitry and signal lines of the throat region and vice versa.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: November 25, 2014
    Assignee: Round Rock Research, LLC
    Inventors: J. Wayne Thompson, Jeffrey P. Wright, Victor Wong, Jim Cullum
  • Memory architecture
    Patent number: 7236385
    Abstract: A DDR SDRAM where unidirectional row logic is associated with and connected to a single memory array instead of being associated with and connected to multiple memory arrays. The unidirectional row logic is located in the outward periphery of its associated array, but is not within a throat region between two arrays. The location of the row logic allows the throat region to include more bidirectional IO circuitry and signal lines servicing two arrays, which increases the performance of the SDRAM. In addition, separate power bussing is employed for the memory arrays and IO circuitry. This prevents noise from the arrays from affecting the IO circuitry and signal lines of the throat region and vice versa.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: June 26, 2007
    Assignee: Micron Technology, Inc.
    Inventors: J. Wayne Thompson, Jeffrey P. Wright, Victor Wong, Jim Cullum
  • Memory architecture
    Publication number: 20060245231
    Abstract: A DDR SDRAM where unidirectional row logic is associated with and connected to a single memory array instead of being associated with and connected to multiple memory arrays. The unidirectional row logic is located in the outward periphery of its associated array, but is not within a throat region between two arrays. The location of the row logic allows the throat region to include more bidirectional IO circuitry and signal lines servicing two arrays, which increases the performance of the SDRAM. In addition, separate power bussing is employed for the memory arrays and IO circuitry. This prevents noise from the arrays from affecting the IO circuitry and signal lines of the throat region and vice versa.
    Type: Application
    Filed: June 29, 2006
    Publication date: November 2, 2006
    Inventors: J. Thompson, Jeffrey Wright, Victor Wong, Jim Cullum
  • Memory architecture
    Publication number: 20060013056
    Abstract: A DDR SDRAM where unidirectional row logic is associated with and connected to a single memory array instead of being associated with and connected to multiple memory arrays. The unidirectional row logic is located in the outward periphery of its associated array, but is not within a throat region between two arrays. The location of the row logic allows the throat region to include more bidirectional IO circuitry and signal lines servicing two arrays, which increases the performance of the SDRAM. In addition, separate power bussing is employed for the memory arrays and IO circuitry. This prevents noise from the arrays from affecting the IO circuitry and signal lines of the throat region and vice versa.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 19, 2006
    Inventors: J. Thompson, Jeffrey Wright, Victor Wong, Jim Cullum