Abstract: An apparatus with an edge ring configured to surround a perimeter of a semiconductor wafer in a semiconductor process, the edge ring having a plurality of protrusions located on an upper surface of the edge ring, the protrusions capable of preventing the semiconductor wafer from moving outside the bounds of a process plane. There is also an apparatus having a semiconductor process chamber and an electrostatic chuck, a semiconductor wafer, and an edge ring. There is also a method including providing a semiconductor process chamber, semiconductor wafer disposed within the semiconductor process chamber, and an edge ring, the edge ring having a plurality of protrusions located on an upper surface of the edge ring, the protrusions capable of preventing the semiconductor wafer from moving outside the bounds of a process plane. The method also includes performing an etch process on the semiconductor wafer.

Abstract: Various embodiments of a plasma coil, methods of making the same, a processing apparatus utilizing plasma processes and methods of manufacture are disclosed. In one aspect, a plasma coil is provided that includes a first conductor coil that has a plurality of turns. An innermost of the plurality of turns terminates to define a central void portion and an outermost of the plurality of turns defines a peripheral portion. A first conductor plate is positioned in the central void portion of and coupled in series to the first conductor coil. The conductor plate provides a more uniform and intense electrical field in order to retard residue formation on plasma chamber windows.

Abstract: Various embodiments of a plasma coil, methods of making the same, a processing apparatus utilizing plasma processes and methods of manufacture are disclosed. In one aspect, a plasma coil is provided that includes a first conductor coil that has a plurality of turns. An innermost of the plurality of turns terminates to define a central void portion and an outermost of the plurality of turns defines a peripheral portion. A first conductor plate is positioned in the central void portion of and coupled in series to the first conductor coil. The conductor plate provides a more uniform and intense electrical field in order to retard residue formation on plasma chamber windows.