Patents by Inventor Jim Hayden

Jim Hayden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Monolithic semiconductor body with convex structure
    Patent number: 5539216
    Abstract: A monolithic semiconductor body (26) resides in an opening (16) formed in an insulating layer (14). The monolithic semiconductor body (26) includes an elongated region (20) filling the opening (16) in the insulating layer (14) and contacting a semiconductor region (12). The monolithic semiconductor body (26) further includes a surface region (24) overlying the elongated region (20) and a portion of the surface (22) of the insulating layer (14) adjacent to the opening (16). The monolithic semiconductor body (26) is fabricated by first depositing a layer of semiconductor material into the opening (16), then planarizing the surface of the insulating layer (14). Next, a selective deposition process is carried out to form the surface region (24) using the semiconductor material in the opening (16) as a nucleation site. The radius of curvature of the surface region (24) is determined by the amount of controlled overgrowth during the selective deposition process.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: July 23, 1996
    Assignee: Motorola, Inc.
    Inventors: Bich-Yen Nguyen, Marius Orlowski, Philip J. Tobin, Jim Hayden, Jack Higman
  • Method for forming a nonvolatile memory device
    Patent number: 5496756
    Abstract: A nonvolatile SRAM cell (20) includes a six-transistor SRAM cell portion (22) and a three-transistor nonvolatile memory portion (30). The nonvolatile memory portion (30) is connected to one storage node (101) of the SRAM cell portion (22). The nonvolatile SRAM cell (20) is three-dimensionally integrated in four layers of polysilicon. The nonvolatile memory portion (30) includes a thin film memory cell (32) having an oxide-nitride-oxide structure (41), and is programmable with a relatively low programming voltage. The three-dimensional integration of the nonvolatile SRAM cell (20) and relatively low programming voltage results in lower power consumption and smaller cell size.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: March 5, 1996
    Assignee: Motorola Inc.
    Inventors: Umesh Sharma, Jim Hayden, Howard C. Kirsch
  • Three-dimensionally integrated nonvolatile SRAM cell and process
    Patent number: 5488579
    Abstract: A nonvolatile SRAM cell (20) includes a six-transistor SRAM cell portion (22) and a three-transistor nonvolatile memory portion (30). The nonvolatile memory portion (30) is connected to one storage node (101) of the SRAM cell portion (22). The nonvolatile SRAM cell (20) is three-dimensionally integrated in four layers of polysilicon. The nonvolatile memory portion (30) includes a thin film memory cell (32) having an oxide-nitride-oxide structure (41), and is programmable with a relatively low programming voltage. The three-dimensional integration of the nonvolatile SRAM cell (20) and relatively low programming voltage results in lower power consumption and smaller cell size.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: January 30, 1996
    Assignee: Motorola Inc.
    Inventors: Umesh Sharma, Jim Hayden, Howard C. Kirsch