Abstract: A subscriber unit of a time division multiple access (TDMA) radiotelephone system is, from a power consumption standpoint, reconfigured in each time slot of a TDMA frame to a power consumption tessellation in which subscriber unit circuit components not needed for communication signal processing in that time slot are powered down, and other components are powered up. Some circuit components are powered down by switching their power supply circuits. In order to minimize the extent of circuitry that must be provided to distribute power consumption control signals, other techniques (which utilize circuitry provided for other purposes), such as clock frequency control or power down commands, also are utilized to modify controlled circuit component power consumption without actually controlling power supply circuits.

Abstract: A pipeline Fast Fourier Transform arrangement includes a cascade of four Butterfly Arithmetic Units (BAU). Weighting and control signals are coupled to each BAU in the cascade. A multiplexed memory arrangement operated in a "ping-pong" manner stores four-stage partial FFT signal as it is generated, and returns it to the first BAU in the cascade for subsequent passes to generate multiple-stage FFT signals. Each BAU includes local memories cyclically fed and addressed to generate temporal offsets, which differ among the processors of the cascade.