Abstract: A method for fabricating an interconnect structure is described. A substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted. A damascene structure is formed in the first porous low-k layer to electrically connect with the conductive part, and then a first UV-absorption layer is formed on the first porous low-k layer and the damascene structure. A second porous low-k layer is formed on the first UV-absorption layer, and a second UV-curing step is conducted.

Abstract: A method for fabricating an interconnect structure is described. A substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted. A damascene structure is formed in the first porous low-k layer to electrically connect with the conductive part, and then a first UV-absorption layer is formed on the first porous low-k layer and the damascene structure. A second porous low-k layer is formed on the first UV-absorption layer, and a second UV-curing step is conducted.

Abstract: An interconnect structure is described, disposed on a substrate with a conductive part thereon and including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connecting with the conductive part, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a UV-absorption layer at least between the first and the second porous low-k layers.

Abstract: An inlaid copper/barrier interconnect includes a semiconductor substrate; a carbon-doped oxide (CDO) dielectric layer disposed over the semiconductor substrate; a damascene recess etched into the CDO dielectric layer; an alpha-phase tantalum (?-Ta) single-layer barrier sputter deposited on sidewall and bottom of the damascene recess; and a conductive layer deposited directly on the alpha-phase tantalum single-layer barrier, wherein the conductive layer fills the damascene recess. According to one preferred embodiment, the alpha-phase tantalum single-layer barrier has a resistivity of about 25 ??-cm.

Abstract: A manufacturing method of interconnect is provided. A dielectric layer is provided. A metal layer is formed in the dielectric layer. A fluorine-containing barrier layer is formed on the dielectric layer and covers the metal layer. The fluorine-containing barrier layer is formed by using chemical deposition method and introducing fluorine to the film in-situ.

Abstract: A method for determining end-point in a chamber cleaning process is disclosed which can be carried out by first providing a chamber that has a cavity for conducting a semiconductor fabrication process therein, then mounting a crystal sensor on a surface of the chamber cavity at a position that the sensor is exposed to gases or liquids or generated by the fabrication process; conducting a semiconductor fabrication process in the chamber; flowing a cleaning fluid into and in-situ cleaning the surface of the chamber cavity; inputting an oscillating frequency into the crystal sensor and monitoring an output frequency of oscillation from the sensor; and comparing the output frequency of oscillation to an output frequency from a crystal sensor that has a clean surface and determining when the surface of the chamber cavity is cleaned.

Abstract: A method for determining end-point in a chamber cleaning process is disclosed which can be carried out by first providing a chamber that has a cavity for conducting a semiconductor fabrication process therein, then mounting a crystal sensor on a surface of the chamber cavity at a position that the sensor is exposed to gases or liquids or generated by the fabrication process; conducting a semiconductor fabrication process in the chamber; flowing a cleaning fluid into and in-situ cleaning the surface of the chamber cavity; inputting an oscillating frequency into the crystal sensor and monitoring an output frequency of oscillation from the sensor; and comparing the output frequency of oscillation to an output frequency from a crystal sensor that has a clean surface and determining when the surface of the chamber cavity is cleaned.