Abstract: A high side current sensing amplifier architecture is simplified and improved over prior art current sensing amplifier circuits by using chopping only, without requiring auto-zeroing, and by using a simpler (and faster) switched capacitor filter instead of an auto-zeroing integrator filter. Also, VIP (positive DC sense node) is merged with the VDDHV (power supply) node, such that the integrated circuit package requires only a single node (package pin) to accommodate both the VIP and VDDHV connections for the current sensing amplifier circuit, resulting in being able to use a smaller integrated circuit package. A small resistor is coupled between VIP and VDDHV to reduce the offset considerably. A low latency time high voltage level shifter is provided which is essential for precise chopping operation.

Abstract: An amplifier includes a differential positive input, a differential negative input, and a transistor. The transistor is communicatively coupled to the differential positive input and differential negative input at a source of the transistor. The transistor is configured to track input common mode of the differential positive input and differential negative input.

Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.

Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

Abstract: An amplifier includes a differential positive input, a differential negative input, and a transistor. The transistor is communicatively coupled to the differential positive input and differential negative input at a source of the transistor. The transistor is configured to track input common mode of the differential positive input and differential negative input.

Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a chopping modulator circuit that continuously swaps tail current sources between the transconductors. This tail current swapping reduces the contribution to the CFIA's gain error caused by random mismatch between the tail currents of the input and feedback transconductors. The modulator circuit operates on a clock cycle to periodically swap the tail current sources. As a result, even if the tail currents are mismatched, on average the tail currents (transconductor gains) will approximately equal out, and the contribution of the tail current difference to the gain error is canceled out.

Abstract: A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

Abstract: A high side current sensing amplifier architecture is simplified and improved over prior art current sensing amplifier circuits by using chopping only, without requiring auto-zeroing, and by using a simpler (and faster) switched capacitor filter instead of an auto-zeroing integrator filter. Also, VIP (positive DC sense node) is merged with the VDDHV (power supply) node, such that the integrated circuit package requires only a single node (package pin) to accommodate both the VIP and VDDHV connections for the current sensing amplifier circuit, resulting in being able to use a smaller integrated circuit package. A small resistor is coupled between VIP and VDDHV to reduce the offset considerably. A low latency time high voltage level shifter is provided which is essential for precise chopping operation.

Abstract: A method, device and system for efficient allocation of an available current supply to a first and second USB power port. The current drawn by a device connected to the first power port is measured and the first power port designated as a priority port. A first current limit is assigned to the priority port, where the selected first current limit is the lowest available current limit setting that is greater than the measured current draw on the priority port. A second current limit is assigned to the second power port, where the assigned second current limit is the highest available current limit setting that is less than or equal to the available current minus the first current limit. The current drawn on the priority port is periodically measured and the first current limit and the second current limit are adjusted accordingly to efficiently distribute the available current.

Abstract: Variable speed drive controlled discharge pumps are used for pumping chilled water from a chilled water storage tank to coils operatively associated with the air inlet of a gas turbine, wherein the gas turbine is used to generate electricity. Use of the variable speed drive controlled discharge pumps aids is protecting the temperature distribution in the chilled water storage tank so that a thermocline rises with the addition of chilled water during charging of the tank with chilled water, and lowers during discharge of the tank when using the chilled water to cool inlet air at one or more gas turbines operated at a facility.

Abstract: An integrated circuit operational amplifier (op amp) is protected from input voltage levels which may cause output phase reversal of the op amp. Voltage comparators monitor the input voltages to the op amp differential input transistor pair. The op amp and comparators may be fabricated on an integrated circuit substrate and packaged in an integrated circuit package When the input voltage is of such a value which may cause output phase reversal, a comparator senses same and is coupled to circuits within the op amp which prevent the op amp output voltage from going into phase reversal.

Abstract: An integrated circuit operational amplifier (op amp) is protected from input voltage levels which may cause output phase reversal of the op amp. Voltage comparators monitor the input voltages to the op amp differential input transistor pair. The op amp and comparators may be fabricated on an integrated circuit substrate and packaged in an integrated circuit package When the input voltage is of such a value which may cause output phase reversal, a comparator senses same and is coupled to circuits within the op amp which prevent the op amp output voltage from going into phase reversal.

Abstract: A method for selecting a destination in a vehicle navigation system is described. A plurality of options are provided for designating the destination in the system's user interface. A first option employs at least one street name to designate the destination. In response to selection of the first option, a list of cities is provided for display in the user interface. The list of cities includes a first plurality of cities for which no street names are available for display and a second plurality of cities for which only a few street names are available for display. In response to selection of one of the first plurality of cities from the list of cities, a first location associated with the selected city in the map database is selected as the destination.

Abstract: An integrated circuit operational amplifier (op amp) is protected from input voltage levels which may cause output phase reversal of the op amp. Voltage comparators monitor the input voltages to the op amp differential input transistor pair. The op amp and comparators may be fabricated on an integrated circuit substrate and packaged in an integrated circuit package. When the input voltage is of such a value which may cause output phase reversal, a comparator senses same and is coupled to circuits within the op amp which prevent the op amp output voltage from going into phase reversal.

Abstract: A method for selecting a destination in a vehicle navigation system is described. A plurality of options are provided for designating the destination in the system's user interface. A first option employs at least one street name to designate the destination. In response to selection of the first option, a list of cities is provided for display in the user interface. The list of cities includes a first plurality of cities for which no street names are available for display and a second plurality of cities for which only a few street names are available for display. In response to selection of one of the first plurality of cities from the list of cities, a first location associated with the selected city in the map database is selected as the destination.