Abstract: A technique transfers data over a packet-switched network (PSN), comprising a plurality of intermediate nodes, in a manner that does not require that the intermediate nodes support a network layer infrastructure. A network controller coupled to the intermediate nodes acquires topology information associated with the PSN's topology. This information may include pseudo-wire definitions, ingress and egress interface information, ingress and egress labels, and so on. The network controller generates a transport database from the topology information and distributes the transport database to the intermediate nodes. An intermediate node acquires the transport database information and configures a packet-processing engine (PPE), contained within the intermediate node, to process packets acquired by the intermediate node.

Abstract: A technique controls the capacity of a virtual concatenation group (VCG) carried on a SONET path of a data network. Efficient control of VCG capacity is provided by emulating aspects of a Link Capacity Adjustment Scheme (LCAS) protocol in software. A hardware poller facility is employed to manage the status and state of the VCG, as well as members belonging to the VCG. The hardware poller contains one or more VCG state machines (VSMs) and member state machines (MSMs) configured to maintain the status and states of the VCGs and their members.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A technique transfers data over a packet-switched network (PSN), comprising a plurality of intermediate nodes, in a manner that does not require that the intermediate nodes support a network layer infrastructure. A network controller coupled to the intermediate nodes acquires topology information associated with the PSN's topology. This information may include pseudo-wire definitions, ingress and egress interface information, ingress and egress labels, and so on. The network controller generates a transport database from the topology information and distributes the transport database to the intermediate nodes. An intermediate node acquires the transport database information and configures a packet-processing engine (PPE), contained within the intermediate node, to process packets acquired by the intermediate node.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A method of alleviating network congestion in an emulated Local Area Network (ELAN) within an Asynchronous Transfer Mode (ATM) network is implemented. The method mitigates network congestion by distributing the connection times of Local Area Network (LAN) Emulation Client (LEC) to an ELAN over random periods of time. When a LAN Emulation Server (LES) or Broadcast and Unknown Server (BUS) attempts to build point-to-multipoint connections to the LEC, it issues control messages to network switches. If the messages are dropped or rejected the LES or BUS recognizes the network is in a congested state and randomly retries to attempt connection.

Abstract: A route switching layer is provided to end stations on a local area network (LAN) segment between the network layer protocol stack and the LAN adapter device driver. The route switching layer reads the network layer protocol header in a data frame queued for transmission. If the data frame is destined for a station on a different LAN segment, the route switching layer compares the network layer address with entries stored in a local address table. If a match occurs, the route switching layer inserts the corresponding data link layer address from the table in the data link header that is appended to the data frame. The data frame is then transmitted directly from source to destination end station by a hardware switch. If an address table match does not occur, the source station route switching layer sends a query to a route server device for the data link layer address corresponding to the network layer address of the destination end station.

Abstract: A multiported LAN switch comprised of legacy local area network ports and ATM ports. Each ATM port comprising a hardware forwarding engine for bridging LAN frames from the LAN ports to the ATM port. The hardware forwarding engine converts layer 2 protocols between the dissimilar ports expediently, without requiring intervention by a microprocessor. A substantial performance gain is attained compared to microprocessor controlled format converters. Both LAN emulation and virtual LANs are supported.

Abstract: A method and system are provided for traffic shaping and bandwidth scaling in a high speed internetworking device. A slot time wheel mechanism is provided for traffic rate control and a credit/debit mechanism is provided for traffic shaping and scaling. The high speed traffic scaler and shaper incorporates a programmable slot time wheel, a traffic scaler state machine, a traffic shaper parameter table and a traffic scaler processor. The traffic scaler processor incorporates a traffic queue allocation manager, a queue priority arbiter, a port enable selector, a port priority arbiter and a DMA channel arbiter. The traffic queue allocation manager and the queue priority, port priority and DMA channel arbiters are each controlled by a corresponding state machine. The parameters in the traffic shaper parameter table are dynamically updated for each logical queue and are used to enable the credit/debit mechanism.