Patents by Inventor Jim Su

Jim Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9011638
    Abstract: A method of chip sorting comprises providing a chip holder having a first surface; providing multiple chips on the first surface; providing a chip receiver having a second surface, wherein the second surface faces the first surface; attaching the multiple chips to the second surface; decreasing an adhesion between the multiple chips and the first surface; and separating the multiple chips from the first surface after the step of decreasing the adhesion between the multiple chips and the first surface.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: April 21, 2015
    Assignee: Epistar Corporation
    Inventors: Chen-Ke Hsu, Liang Sheng Chi, Chun-Chang Chen, Win-Jim Su, Hsu-Cheng Lin, Mei-Ling Tsai, Yi Lung Liu, Chen Ou
  • Publication number: 20140202627
    Abstract: A method of chip sorting comprises providing a chip holder having a first surface; providing multiple chips on the first surface; providing a chip receiver having a second surface, wherein the second surface faces the first surface; attaching the multiple chips to the second surface; decreasing an adhesion between the multiple chips and the first surface; and separating the multiple chips from the first surface after the step of decreasing the adhesion between the multiple chips and the first surface.
    Type: Application
    Filed: March 19, 2014
    Publication date: July 24, 2014
    Applicant: EPISTAR CORPORATION
    Inventors: Chen-Ke HSU, Liang Sheng CHI, Chun-Chang CHEN, Win-Jim SU, Hsu-Cheng LIN, Mei-Ling TSAI, Yi Lung LIU, Chen OU
  • Patent number: 8753909
    Abstract: A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: June 17, 2014
    Assignee: Epistar Corporation
    Inventors: Chen-Ke Hsu, Win Jim Su, Chia-Ming Chuang, Chen Ou
  • Patent number: 8714227
    Abstract: A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: May 6, 2014
    Assignee: Epistar Corporation
    Inventors: Chen-Ke Hsu, Liang-Sheng Chi, Chun-Chang Chen, Win-Jim Su, Hsu-Cheng Lin, Mei-Ling Tsai, Yi Lung Liu, Chen Ou
  • Publication number: 20130302927
    Abstract: A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Chen Ke HSU, Win Jim SU, Chia-Ming CHUANG, Chen OU
  • Patent number: 8492780
    Abstract: A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: July 23, 2013
    Assignee: Epistar Corporation
    Inventors: Chen Ke Hsu, Win Jim Su, Chia-Ming Chuang, Chen Ou
  • Publication number: 20110017407
    Abstract: A chip sorting apparatus comprising a chip holder comprising a first surface and an second surface opposite to the first surface; a wafer comprising a first chip disposed on a first position of the first surface; a first chip receiver comprising a third surface and an fourth surface opposite to the third surface, wherein the third surface is opposite to the first surface; a pressurization device making the first chip and the third surface of the first chip receiver adhered to each other through pressuring the second surface at where corresponding to the first position; and a separator decreasing the adhesion between the first chip and the first surface.
    Type: Application
    Filed: July 23, 2010
    Publication date: January 27, 2011
    Inventors: Chen-Ke Hsu, Liang-Sheng Chi, Chun-Chang Chen, Win-Jim Su, Hsu-Cheng Lin, Mei-Ling Tsai, Yi Lung Liu, Chen Ou
  • Publication number: 20100200885
    Abstract: A light emitting device and a method of fabricating thereof are provided. The method of fabricating the light emitting device comprises: providing a substrate having a first major surface and a second major surface; forming a plurality of light-emitting stacks on the first major surface; forming an etching protection layer on each of the light emitting stacks; forming a plurality of holes by a discontinuous laser beam on the substrate; etching the plurality of holes; and slicing off the substrate along the plurality of holes to form a light emitting device. The light emitting device has a substrate wherein the sidewall of the substrate comprising a first area with a substantially flat surface and a second area with substantially textured surface.
    Type: Application
    Filed: February 11, 2010
    Publication date: August 12, 2010
    Inventors: Chen Ke HSU, Win Jim Su, Chia-Ming Chuang, Chen Ou
  • Patent number: 7256092
    Abstract: A high-voltage semiconductor MOS process that is fully compatible with low-voltage MOS process is provided. The high-voltage N/P well are implanted into the substrate prior to the definition of active areas. The channel stop doping regions are formed after the formation of field oxide layers, thus avoiding lateral diffusion of the channel stop doping regions. In addition, the grade drive-in process used to activate the grade doping regions in the high-voltage device area and the gate oxide growth of the high-voltage devices are performed simultaneously.
    Type: Grant
    Filed: July 25, 2004
    Date of Patent: August 14, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Jung-Ching Chen, Jy-Hwang Lin, Sheng-Hsiung Yang, Jim Su
  • Publication number: 20060017114
    Abstract: A high-voltage semiconductor MOS process that is fully compatible with low-voltage MOS process is provided. The high-voltage N/P well are implanted into the substrate prior to the definition of active areas. The channel stop doping regions are formed after the formation of field oxide layers, thus avoiding lateral diffusion of the channel stop doping regions. In addition, the grade drive-in process used to activate the grade doping regions in the high-voltage device area and the gate oxide growth of the high-voltage devices are performed simultaneously.
    Type: Application
    Filed: July 25, 2004
    Publication date: January 26, 2006
    Inventors: Jung-Ching Chen, Jy-Hwang Lin, Sheng-Hsiung Yang, Jim SU
  • Patent number: 6693043
    Abstract: A unique photoresist strip sequence using a downstream plasma system is described. The sequence can include a RF directional plasma alone, downstream plasma alone or combine both RF plasma and downstream plasma together. The process sequence can be a single step or multiple steps, which produce high strip rates while maintaining the dielectric properties of the film. The process can be an oxidizing process carried out at low temperature and low pressure, which reduces the reactivity of the oxygen with the low-k film. Furthermore, by adding a small percentage of an additive gas, such as a fluorine-containing gas, to the plasma, the inorganic residues from the strip process are removed, leaving a clean film cleared of photoresist and residue.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: February 17, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Senzi Li, Helmuth Treichel, Kirk Ostrowski, Chevan Goonetilleke, Jim Su, David L. Chen
  • Patent number: 5895937
    Abstract: A method of etching openings in a dielectric layer of a semiconductor device by utilizing a novel etchant gas system of sulfur hexafluoride/chlorine such that sloped sidewalls can be formed in the openings having a desired taper of between about 20.degree. and about 85.degree. for achieving improved step coverage and profile control of the TFT fabrication process.
    Type: Grant
    Filed: October 21, 1997
    Date of Patent: April 20, 1999
    Assignee: Applied Komatsu Technology, Inc.
    Inventors: Yuh-Jia (Jim) Su, Yuen-Kui (Jerry) Wong, Kam S. Law, Haruhiro (Harry) Goto
  • Patent number: 5728608
    Abstract: A method of etching openings in a dielectric layer of a semiconductor device by utilizing a novel etchant gas system of sulfur hexafluoride/chlorine such that sloped sidewalls can be formed in the openings having a desired taper of between about 20.degree. and about 85.degree. for achieving improved step coverage and profile control of the TFT fabrication process.
    Type: Grant
    Filed: October 11, 1995
    Date of Patent: March 17, 1998
    Assignee: Applied Komatsu Technology, Inc.
    Inventors: Yuh-Jia (Jim) Su, Yuen-Kui (Jerry) Wong, Kam S. Law, Haruhiro (Harry) Goto
  • Patent number: 5657523
    Abstract: A positioning mechanism of a turret index which performs index rotation by the use of an index mechanism to transmit output shaft motion and perform positioning by a three-piece toothed coupler. The present invention uses a hydraulic system to control the division and the combination of the three-piece toothed coupling to attain the turret's precise positioning and comprises a piston ring on the output shaft. The area of the piston ring's end plane which is subjected to hydraulic pressure, is greater than the area of the slider's end plane inside the three-piece toothed coupler and its end plane is also subjected to hydraulic pressure. At the same time the three-piece toothed coupler is in meshing, the output shaft can obtain an inward pulling force to prevent the output shaft from propping up only a very small distance.
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: August 19, 1997
    Assignee: Industrial Technology Research Institute
    Inventors: Ching-Yuan Lin, Win-Jim Su
  • Patent number: 5386743
    Abstract: In a turret indexing device, a coupling containing three gear members is employed in a turret indexing device to cooperate with an indexing disc mounted on an output shaft which is adapted to hold an indexing head. The coupling is operated by a first cam fixedly mounted on an input shaft through a lever mechanism, and the indexing disc is driven by a second cam fixedly mounted on the same input shaft. The three gear members include a first gear member fixedly mounted on a collar slidably mounted on the output shaft, a second gear member which is fixedly mounted on a stationary housing, and third gear member fixedly mounted on a head end of the output shaft.
    Type: Grant
    Filed: July 13, 1993
    Date of Patent: February 7, 1995
    Assignee: Industrial Technology Research Institute
    Inventors: Win-Jim Su, Ching-Yuan Lin, Jung-Hong Huang