Abstract: Certain embodiments of the invention may be found in a method and system for monitoring a set of semaphore registers using a limited-width test bus. Each semaphore register represents a separate hardware resource. The bits in a semaphore register are monitored jointly to determine whether the hardware resource it represents is in use by a software thread. The bits in the same register bit location of all the semaphore registers are monitored jointly to determine the ID number of the software thread currently using the hardware resource. The limited-width test bus comprises of bit lines representing each semaphore registers and bit lines representing the contents of the semaphore registers. Semaphore protocol steps are used in addition to changes monitored by the limited-width test bus to determine current usage of each hardware resource and to identify the ID number of the software thread using a hardware resource.

Abstract: Systems and methods for creating a limited duration clock divider reset are disclosed. Aspects of the invention may include a method for resetting a chip or a circuit. The method may include buffering a main reset input signal, inverting the main reset input signal to create an active high reset signal, resetting a counter utilizing the active high reset signal, comparing a counter output value and a counter-associated value in a comparator to obtain a comparator output value, and applying an OR logical operation to the comparator output. A limited duration clock divider reset may be generated from the output of the OR logical operation. The OR logical operation may be applied to the buffered main reset input signal. The comparator output may be inverted.

Abstract: Systems and methods for creating a limited duration clock divider reset are disclosed. Aspects of the invention may include a method for resetting a chip or a circuit. The method may include buffering a main reset input signal, inverting the main reset input signal to create an active high reset signal, resetting a counter utilizing the active high reset signal, comparing a counter output value and a counter-associated value in a comparator to obtain a comparator output value, and applying an OR logical operation to the comparator output. A limited duration clock divider reset may be generated from the output of the OR logical operation. The OR logical operation may be applied to the buffered main reset input signal. The comparator output may be inverted.

Abstract: Certain embodiments of the invention may be found in a method and system for monitoring a set of semaphore registers using a limited-width test bus. Each semaphore register represents a separate hardware resource. The bits in a semaphore register are monitored jointly to determine whether the hardware resource it represents is in use by a software thread. The bits in the same register bit location of all the semaphore registers are monitored jointly to determine the ID number of the software thread currently using the hardware resource. The limited-width test bus comprises of bit lines representing each semaphore registers and bit lines representing the contents of the semaphore registers. Semaphore protocol steps are used in addition to changes monitored by the limited-width test bus to determine current usage of each hardware resource and to identify the ID number of the software thread using a hardware resource.

Abstract: A system, method, and apparatus for sharing revision control databases is presented herein. Access to files in a first repository is provided to a group of users associated with the second repository by placement of a link in the second repository. The link in the second repository points to a shared files subdirectory in the first repository. The users associated with the second repository access files in the shared files subdirectory by accessing the second repository and selecting the link.