Patents by Inventor Jimin Wen
Jimin Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250088358Abstract: Methods, machine readable media and systems for evaluating, through one or more simulations, the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. The embodiments can use machine learning models, such as one or more neural networks to generate one or more leakage related scores for each portion in a set of portions of the cryptographic data. In one embodiment, leakage data associated the first set of POIs with one or more neural networks is processed by the one or more neural networks to identify the POIs that leak the most and determine one or more scores for each portion in the set of portions of the cryptographic data.Type: ApplicationFiled: November 22, 2024Publication date: March 13, 2025Inventors: Jimin Wen, Hua Chen, Deqi Zhu, Lang Lin, Norman Chang, Chia-Wei Chen
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Patent number: 12242781Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: GrantFiled: November 13, 2023Date of Patent: March 4, 2025Assignee: ANSYS, INC.Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 12177349Abstract: Methods, machine readable media and systems for evaluating, through one or more simulations, the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. The embodiments can use machine learning models, such as one or more neural networks to generate one or more leakage related scores for each portion in a set of portions of the cryptographic data. In one embodiment, leakage data associated the first set of POIs with one or more neural networks is processed by the one or more neural networks to identify the POIs that leak the most and determine one or more scores for each portion in the set of portions of the cryptographic data.Type: GrantFiled: October 11, 2021Date of Patent: December 24, 2024Assignee: ANSYS, INC.Inventors: Jimin Wen, Hua Chen, Deqi Zhu, Lang Lin, Norman Chang, Chia-Wei Chen
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Publication number: 20240119147Abstract: A method in one embodiment creates a model of an authentic IC for use in comparisons with counterfeit ICs. The model can be created by determining a first or initial set of points of interest (POIs) on the simulated physical (e.g., gate level) layout and simulating side channel leakage from each POI and then expanding the size of the POI and repeating the simulation and comparing successive simulation results (between successive sizes of POIs for a given POI) to determine if a solution for the size of the POI has converged. The final POIs are then processed in a simulation that can use multiple payloads (e.g., cryptographic data) over the entire set of final POIs, and the resulting data set can be used to create the model.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Deqi Zhu, Hua Chen, Jimin Wen, Lang Lin, Norman Chang, Dinesh Selvakumaran, Gang Ni
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Publication number: 20240078362Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Norman CHANG, Hsiming PAN, Jimin WEN, Deqi ZHU, Wenbo XIA, Akhilesh KUMAR, Wen-Tze CHUANG, En-Cih YANG, Karthik SRINIVASAN, Ying-Shiun LI
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Patent number: 11914931Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. The methods can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC); performing a thermal simulation for each respective template of the IC based on a sequence of power patterns of tiles of the respective template; and training a neural network with a plurality of training data collected via thermal simulations performed for the templates of the IC. These systems and methods can use a machine learning predictor, that has been trained to determine a transient temperature rise across an entire IC, and then append the determined transient temperature rise to a system level thermal profile of the IC.Type: GrantFiled: December 30, 2019Date of Patent: February 27, 2024Assignee: ANSYS, INC.Inventors: Akhilesh Kumar, Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 11880456Abstract: A method in one embodiment creates a model of an authentic IC for use in comparisons with counterfeit ICs. The model can be created by determining a first or initial set of points of interest (POIs) on the simulated physical (e.g., gate level) layout and simulating side channel leakage from each POI and then expanding the size of the POI and repeating the simulation and comparing successive simulation results (between successive sizes of POIs for a given POI) to determine if a solution for the size of the POI has converged. The final POIs are then processed in a simulation that can use multiple payloads (e.g., cryptographic data) over the entire set of final POIs, and the resulting data set can be used to create the model.Type: GrantFiled: August 13, 2021Date of Patent: January 23, 2024Assignee: ANSYS, INC.Inventors: Deqi Zhu, Hua Chen, Jimin Wen, Lang Lin, Norman Chang, Dinesh Selvakumaran, Gang Ni
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Patent number: 11853661Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: GrantFiled: May 20, 2022Date of Patent: December 26, 2023Assignee: ANSYS, INC.Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Publication number: 20230367885Abstract: Techniques for security vulnerability assessment of security-sensitive circuit designs are described. A placement of security-sensitive components of a design may be based on constraints related to how far apart a relevant set of security-sensitive components are allowed without consuming too much power and how to optimize the placement to minimize electromagnetic side-channel leakage or other security vulnerabilities. In one embodiment, a method may receive data that includes a representation of a design of an IC and may identify security-sensitive components of the design from the data. The method may determine a placement for the design based on constraints on a level of security vulnerabilities of the security-sensitive components and may perform a power simulation for the design based on the placement. The method may generate an assessment of the level of security vulnerabilities of the security-sensitive components based on the power simulation to adjust the placement for the design.Type: ApplicationFiled: December 14, 2022Publication date: November 16, 2023Inventors: Lang LIN, Kayhan KUCUKCAKAR, Jimin WEN, Norman CHANG, Preeti GUPTA, Hua CHEN
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Patent number: 11797744Abstract: A specification for a semi-conductor chip is received. The specification specifies a set of photomasks associated with a metal layer of the semi-conductor chip. Multiple portions of an area of the metal layer are identified. A respective image is generated for each portion of the area based on the photomasks. A respective drawn density of metal wires for each portion of the area is calculated. A trained machine learning model is invoked to predict a respective silicon density of metal wires for each respective portion of the area based on an image and a drawn density for the respective portion of the area. A silicon density for the area of the metal layer is calculated based on a combination of predicted silicon densities for the multiple portions of the area. The combination is based on an average value of the predicted silicon densities for the multiple portions of the area.Type: GrantFiled: February 18, 2021Date of Patent: October 24, 2023Assignee: ANSYS Inc.Inventors: Wen-Tze Chuang, Norman Chang, Lei Yin, Bolong Zhang, Xi Chen, Jay Prakash Pathak, En Cih Yang, Jimin Wen, Akhilesh Kumar, Ming-Chih Shih, Ying Shiun Li
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Publication number: 20220277120Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: May 20, 2022Publication date: September 1, 2022Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 11366947Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: GrantFiled: December 10, 2019Date of Patent: June 21, 2022Assignee: ANSYS, INC.Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Publication number: 20210200915Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. The methods can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC); performing a thermal simulation for each respective template of the IC based on a sequence of power patterns of tiles of the respective template; and training a neural network with a plurality of training data collected via thermal simulations performed for the templates of the IC. These systems and methods can use a machine learning predictor, that has been trained to determine a transient temperature rise across an entire IC, and then append the determined transient temperature rise to a system level thermal profile of the IC.Type: ApplicationFiled: December 30, 2019Publication date: July 1, 2021Inventors: Akhilesh Kumar, Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Publication number: 20210173983Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: December 10, 2019Publication date: June 10, 2021Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 9805151Abstract: Disclosed are methods and apparatus for implementing system simulation. The method includes generating a high-order equation based on a transfer function that represents characteristics of at least one frequency-domain component in a circuit; converting the high-order equation into a state equation comprising a series of state variables, wherein the high-order equation and the state equation have corresponding coefficients for each order and state variable, and the coefficients of the state equation have a first dynamic range; and normalizing the coefficients for the state variables by adjusting each state variable with a corresponding factor to obtain a normalized state equation having normalized coefficients, wherein the normalized coefficients of the normalized state equation have a second dynamic range smaller than the first dynamic range. The method and apparatus improve accuracy of analyses for the system.Type: GrantFiled: May 2, 2013Date of Patent: October 31, 2017Assignee: Cadence Design Systems, Inc.Inventors: Jimin Wen, Peng Wang