Abstract: An apparatus for supporting I2C bus masters on a secondary side of an I2C mulitplexor is disclosed. An electronic system includes a primary serial bus, multiple secondary serial buses, an expander, multiple direction latches, a multiplexor, multiple busy detect circuits, and a to-from multiplexor circuit. The expander, which is coupled to the primary serial bus, includes multiple outputs that can be selectively activated. Each of the direction latches is coupled to a respective one of the outputs of the expander. The multiplexor, which is coupled to the direction latches, includes several outputs connected to the secondary serial buses such that the secondary serial buses can be selectively connected to the primary serial bus. Each of the busy detect circuits is coupled to a respective one of the outputs of the multiplexor. The busy detect circuits detects if there is a transaction occurring on one of the outputs of the multiplexor.

Abstract: A virtual mirror “crossover” package includes two groups of electrically interconnected pairs of first and second connection points. Within each group, the set of first and second connection points are positioned adjacent opposing edges of a chip carrier or other package, such that one group of connection point pairs can be connected to a first bus running in an “X” direction on a substrate, while the other group of connection point pairs can be connected to a second bus running in a “Y” direction perpendicular to the “X” direction. The virtual mirror crossover package can be used in an array of packages in which the packages in each column are connected to a unique system bus, and a row of packages containing a virtual mirror crossover package is also connected to an inter-system bus (such as a cluster bus) for providing communication between the various system buses via the inter-system bus.

Abstract: A virtual mirror “crossover” package includes two groups of electrically interconnected pairs of first and second connection points. Within each group, the set of first and second connection points are positioned adjacent opposing edges of a chip carrier or other package, such that one group of connection point pairs can be connected to a first bus running in an “X” direction on a substrate, while the other group of connection point pairs can be connected to a second bus running in a “Y” direction perpendicular to the “X” direction. The virtual mirror crossover package can be used in an array of packages in which the packages in each column are connected to a unique system bus, and a row of packages containing a virtual mirror crossover package is also connected to an inter-system bus (such as a cluster bus) for providing communication between the various system buses via the inter-system bus.

Abstract: A computer or other electronic system includes a primary I2C bus and a plurality of secondary I2C buses that can be selectively coupled to the primary bus. The primary I2C bus is coupled to the input of an I/O expander, which has a unique address on the primary bus, and to the bus input of a bus switch. Each of the secondary I2C buses is coupled to a unique one of the bus outputs of the bus switch, which are controlled by a plurality on control inputs. Activating a selected control input of the bus switch couples the primary I2C bus to the corresponding secondary I2C bus. A controller addresses the I/O expander and then transmits a unique data byte that activates a selected output of the expander. Each of the outputs of the I/O expander is coupled to a unique control input of the bus switch through a delay circuit.