Patents by Inventor Jimmy J. Tomblin

Jimmy J. Tomblin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954419
    Abstract: A system may include a set of compute engines. The compute engines may be configured to perform electronic design automation (EDA) operations on a hierarchical dataset representative of an integrated circuit (IC) design. The system may also include a dynamic resource balancing engine configured to allocate computing resources to the set of compute engines and reallocate a particular computing resource allocated to a first compute engine based on an operation priority of an EDA operation performed by a second compute engine, an idle indicator for the first compute engine, or a combination of both.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: April 9, 2024
    Assignee: Siemens Industry Software Inc.
    Inventors: Patrick D. Gibson, Robert A. Todd, Jimmy J. Tomblin
  • Publication number: 20210374319
    Abstract: A system may include a set of compute engines. The compute engines may be configured to perform electronic design automation (EDA) operations on a hierarchical dataset representative of an integrated circuit (IC) design. The system may also include a dynamic resource balancing engine configured to allocate computing resources to the set of compute engines and reallocate a particular computing resource allocated to a first compute engine based on an operation priority of an EDA operation performed by a second compute engine, an idle indicator for the first compute engine, or a combination of both.
    Type: Application
    Filed: October 22, 2018
    Publication date: December 2, 2021
    Inventors: Patrick D. Gibson, Robert A. Todd, Jimmy J. Tomblin
  • Patent number: 10783291
    Abstract: A computing system may include an electronic design automation (EDA) data constructor engine and an EDA executor engine. The EDA data constructor engine may be configured to perform, using the local resources of the computing system, a data preparation phase of an EDA procedure for a circuit design. The EDA executor engine may be configured to acquire remote resources for an execution phase of the EDA procedure, wherein the remote resources include remote compute resources and remote data resources remote to the computing system; broadcast constructor data constructed from the data preparation phase of the EDA procedure to the acquired remote data resources; and manage performance of the execution phase of the EDA procedure by the acquired remote compute resources and remote data resources.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: September 22, 2020
    Assignee: Mentor Graphics Corporation
    Inventors: Robert A. Todd, Laurence W. Grodd, Jimmy J. Tomblin, Patrick D. Gibson
  • Publication number: 20200218788
    Abstract: A computing system may include an electronic design automation (EDA) data constructor engine and an EDA executor engine. The EDA data constructor engine may be configured to perform, using the local resources of the computing system, a data preparation phase of an EDA procedure for a circuit design. The EDA executor engine may be configured to acquire remote resources for an execution phase of the EDA procedure, wherein the remote resources include remote compute resources and remote data resources remote to the computing system; broadcast constructor data constructed from the data preparation phase of the EDA procedure to the acquired remote data resources; and manage performance of the execution phase of the EDA procedure by the acquired remote compute resources and remote data resources.
    Type: Application
    Filed: January 4, 2019
    Publication date: July 9, 2020
    Inventors: Robert A. Todd, Laurence W. Grodd, Jimmy J. Tomblin, Patrick D. Gibson
  • Publication number: 20080235497
    Abstract: Multiple processing threads operate in parallel to convert data, produced by one or more electronic design automation processes in an initial format, into another data format for output. A processing thread accesses a portion of the initial results data produced by one or more electronic design automation processes in an initial format and in an initial organizational arrangement. The processing thread will then store data within this portion of the initial results data belonging to a target category of the desired output organizational arrangement, such as a cell, at a memory location corresponding to that target category. It will also convert the stored data from a first data format to another data format for output. The first data format may use a relatively low amount of compression, with the second data format may use a relatively high level of compression.
    Type: Application
    Filed: November 26, 2007
    Publication date: September 25, 2008
    Inventors: Jimmy J. Tomblin, Laurence W. Grodd, Robert A. Todd