Abstract: A material stack of a synthetic anti-ferromagnetic (SAF) reference layer of a perpendicular magnetic tunnel junction (MTJ) may include an SAF coupling layer. The material stack may also include and an amorphous spacer layer on the SAF coupling layer. The amorphous spacer layer may include an alloy or multilayer of tantalum and cobalt or tantalum and iron or cobalt and iron and tantalum. The amorphous spacer layer may also include a treated surface of the SAF coupling layer.

Abstract: A particular apparatus includes a magnetic tunnel junction (MTJ) device and a transistor. The MTJ device and the transistor are included in a comparator that has a hysteresis property associated with multiple transition points that correspond to magnetic switching points of the MTJ device.

Abstract: A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.

Abstract: A material stack of a synthetic anti-ferromagnetic (SAF) reference layer of a perpendicular magnetic tunnel junction (MTJ) may include an SAF coupling layer. The material stack may also include and an amorphous spacer layer on the SAF coupling layer. The amorphous spacer layer may include an alloy or multilayer of tantalum and cobalt or tantalum and iron or cobalt and iron and tantalum. The amorphous spacer layer may also include a treated surface of the SAF coupling layer.

Abstract: An apparatus includes a polarizer of a spin-torque oscillator (STO). The polarizer has a perpendicular magnetic anisotropy (PMA) and is configured to receive a first signal having a current density of between 0.51×106 amps per square centimeter (amps/cm2) and 15.3×106 amps/cm2. The apparatus also includes a magnetically soft oscillating region including an antiferromagnetic (AF) coupling layer coupling a first free layer to a second free layer and located between the polarizer and a reference region. The reference region is configured to output a second signal responsive to the first signal, the second signal having a frequency less than 8 gigahertz (GHz).

Abstract: Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices. The disclosed devices also have increased thermal stability without increasing required switching current, as critical switching current between states is essentially the same.

Abstract: A material stack of a synthetic anti-ferromagnetic (SAF) reference layer of a perpendicular magnetic tunnel junction (MTJ) may include an SAF coupling layer. The material stack may also include and an amorphous spacer layer on the SAF coupling layer. The amorphous spacer layer may include an alloy or multilayer of tantalum and cobalt or tantalum and iron or cobalt and iron and tantalum. The amorphous spacer layer may also include a treated surface of the SAF coupling layer.

Abstract: A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.

Abstract: An apparatus includes a capping layer disposed on top of a free layer. The apparatus also includes a magnetic etch stop layer disposed on top of the capping layer. The capping layer and the magnetic etch stop layer are included in a spin-transfer torque magnetoresistive random access memory (STT-MRAM) magnetic tunnel junction (MTJ) device.

Abstract: A method for fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes growing a seed layer on a first electrode of the pMTJ device. The seed layer has a uniform predetermined crystal orientation along a growth axis. The method also includes planarizing the seed layer while maintaining the uniform predetermined crystal orientation of the seed layer.

Abstract: An apparatus includes a polarizer, a first free layer, a second free layer, and an antiferromagnetic (AF) coupling layer. The polarizer has a perpendicular magnetic anisotropy (PMA). The polarizer, the first free layer, the second free layer, and the AF coupling layer are included in a spin-torque oscillator (STO). The AF coupling layer is positioned between the first free layer and the second free layer.

Abstract: Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices. The disclosed devices also have increased thermal stability without increasing required switching current, as critical switching current between states is essentially the same.

Abstract: A method and apparatus for testing a magnetic memory device is provided. The method begins when a magnetic field enhancing backing plate is installed in the test fixture. The magnetic field enhancing backing plate may be installed in the wafer chuck of a wafer testing probe station. The magnetic memory device is installed in the test fixture and a magnetic field is applied to the magnetic memory device. The magnetic field may be applied in-plane or perpendicular to the magnetic memory device. The performance of the magnetic memory device may be determined based on the magnetic field applied to the device. The apparatus includes a magnetic field enhancing backing plate adapted to fit a test fixture, possibly in the wafer chuck. The magnetic field enhancing backing plate is fabricated of high permeability magnetic materials, such as low carbon steel, with a thickness based on the magnetic field used in testing.

Abstract: A particular apparatus includes a magnetic tunnel junction (MTJ) device and a transistor. The MTJ device and the transistor are included in a comparator that has a hysteresis property associated with multiple transition points that correspond to magnetic switching points of the MTJ device.

Abstract: A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.

Abstract: An apparatus includes a polarizer, a first free layer, a second free layer, and an antiferromagnetic (AF) coupling layer. The polarizer has a perpendicular magnetic anisotropy (PMA). The polarizer, the first free layer, the second free layer, and the AF coupling layer are included in a spin-torque oscillator (STO). The AF coupling layer is positioned between the first free layer and the second free layer.

Abstract: A method for fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes growing a seed layer on a first electrode of the pMTJ device. The seed layer has a uniform predetermined crystal orientation along a growth axis. The method also includes planarizing the seed layer while maintaining the uniform predetermined crystal orientation of the seed layer.

Abstract: Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices.

Abstract: A magnetic tunnel junction (MTJ) device includes a pinned layer, a tunnel barrier layer on the pinned layer, and a free layer on the tunnel barrier layer. The MTJ device also includes a perpendicular magnetic anisotropic (PMA) enhancement layer on the free layer, a capping layer on the PMA enhancement layer, and a conductive path electrically shorting the capping layer, the PMA enhancement layer and the free layer. A method of fabricating a perpendicular magnetic tunnel junction (pMTJ) device includes forming a capping layer, a perpendicular magnetic anisotropic (PMA) enhancement layer and a free layer. The method also includes forming a conductive layer to short the capping layer, the PMA enhancement layer and the free layer.

Abstract: Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices. The disclosed devices also have increased thermal stability without increasing required switching current, as critical switching current between states is essentially the same.