Abstract: Methods and systems for detecting systemwide service issues by using anomaly localization. In an example, a method includes receiving time-series monitoring data for multiple services, the time-series monitoring data including multiple dimensions and an error metric; for the monitoring data from each service, evaluating scopes within the monitoring data based on an objective function for a time-series of the error metric to identify at least one anomalous scope, each scope including at least one dimension and a value for the dimension; based on evaluating the scopes, generating a ranked list of scopes for each service based on objective function scores for the scopes; correlating the ranked lists of scopes across the multiple services to identify a cross-service anomaly; and generating an alert for the services based on the cross-service anomaly, the alert indicating at least one scope as a potential root cause for the cross-service anomaly.

Abstract: The invention relates to a magnetic-navigation joint type puncture needle which comprises a head section and needle sections, wherein, the head section is made of stainless steel material with high magnetic conductivity and is connected with the following needle sections coaxially mounted with the head section through a flexible joint; two needle sections are also coaxially connected with each other through a flexible joint; the needle sections are made of non-magnetic stainless steel material; the flexible joints adopts serpentine tubes formed by melting and engraving cobalt-chromium alloy through laser; and both the head section and the needle sections can be bent, but the flexibility of the head section and that of the needle sections are smaller than the flexibility of the flexible joints.

Abstract: Techniques for assessing a relationship between two companies are provided. The relationship may be a customer-vendor relationship. Social connections between certain employees at one company and certain employees at another company are compared to determine whether one company is a customer of the other company. For example, if one or more employees with a particular job function/role at a first company are connected to one or more employees with a particular job function/role at a second company, then such connections may be indicative that the two companies are not in a customer-vendor relationship, are in a stage of forming in a customer-vendor relationship, or are in a customer-vendor relationship.

Abstract: According to one example there is a printed circuit board having a first surface and a solder mask over said first surface. There is a layer of sealing material having a shape and location covering a zone of the solder mask which is vulnerable to degradation.

Abstract: An electric propulsion system for a vehicle includes an electric motor operatively connected to a wheel of the vehicle. The system includes a first energy storage electrically connected to the electric motor to provide electric energy to the electric motor. The first energy storage is characterized by a first energy capacity and a first power capacity. The system includes a second energy storage characterized by a second energy capacity and a second power capacity. The second energy capacity is less than the first energy capacity and the second power capacity is greater than the first power capacity. The system includes a control module that detects a request of power for the vehicle and electrically connects the second energy storage to the electric motor to provide electric power based on the request.

Abstract: A method for measuring a magnetic interference width for a magnetic recording head is described. The method includes writing a first track at a first frequency on a magnetic disk, writing a second track at the first frequency on the magnetic disk, and writing a third track at a second frequency on the magnetic disk between the first track and the second track. The third track partially overlaps both the first track and the second track and the second frequency is different from the first frequency. The method further includes measuring a readback profile across the first, second and third tracks on the magnetic disk.

Abstract: Systems and methods for communicating with a network device are provided. In this regard, a representative system, among others, includes a network switch associated with a telecommunications device; and a wireless interface device that wirelessly communicates with the network switch, the wireless interface device being configured to obtain information associated with the network switch and display at least a portion of the information obtained on a display device. A representative method, among others, for communicating with a network switch includes establishing a wireless link between the network switch and a wireless interface device; obtaining information associated with the network switch by the wireless interface device via the wireless link; and displaying at least a portion of the information obtained on a display device of the wireless interface device.

Abstract: The present invention can provide a coded surgical suture, which is capable of affording a visual identification effect for determining the direction or end portions of the surgical suture. The surgical suture can have an elongated body member having first and second end portions. A coding member can be provided on one of the two end portions of the body member to afford a visual identification effect. In an exemplary embodiment, the coding member can have a color element. The present invention can also provide a coding system for identifying the direction or the end portions of a surgical suture or for distinguishing between different surgical sutures.

Abstract: A microprocessor and method which allows data consistency to be maintained between a memory which is external to the microprocessor and a data cache unit. The microprocessor has a central processing unit coupled to a local bus. A direct memory access unit coupled to the central processing unit for loading data from and storing data to the direct access memory unit. The local bus is coupled to a system bus and has a bus control unit controlling the loading and storing of data on the system bus. The system bus transfers data external to the microprocessor using the bus control unit upon instructions from the central processing unit. A data cache unit is coupled to the local bus and selectively stores a copy of data loaded by the bus control unit and receives a memory address from the local bus during a memory access by either the central processing unit or the direct memory access unit.

Abstract: A dynamically expandable pipeline in a microprocessor. The present invention is used in a microprocessor or a microprocessor in a computer system. The present invention delays execution of a cacheable LOAD instruction by a bus controller for one cycle to allow sufficient time for "hit or miss" detection by a data cache unit. The present invention dynamically expands the instruction pipeline for cacheable LOAD instructions that "miss" an on-chip data cache when the LOAD is followed by another instruction that uses the bus controller. The dynamic pipeline allows time for the "hit or miss" detection by the data cache unit without unnecessarily degrading pipeline performance. The present invention offers increased overall microprocessor and computer system performance by allowing efficient implementation of an on-chip data cache. The present invention provides increased performance without undue or overly complex modifications to existing pipeline or data cache circuits.

Abstract: A memory coprocessor architecture and memory arbitration scheme. The coprocessor architecture includes an address generation unit (AGU), a bus control logic unit (BCL) and a combined data cache unit/stack RAM (DCUSR) unit. Each are connected through a memory arbitration unit to a data bus. The memory arbitration unit arbitrates access to the bus by assigning priorities to the coprocessor units. The AGU and the combined DCUSR are mutually exclusive coprocessors which cannot request bus access simultaneously. Hence, the AGU and the combined DCUSR are assigned equal priorities. The BCL is assigned a lower priority and must defer bus access if the AGU or the DCUSR require immediate access. The BCL is provided with a multiple entry queue for storing data temporarily pending access to the queue. A memory scoreboard mechanism is provided such that, if the queue of the BCL becomes full, the BCL can gain immediate access to the bus to allow emptying at least one entry of the queue.

Abstract: A periodic sequence of signals is intiated and provided to a counter. During this time, a pulse (PULSE) is generated. Upon reaching a terminal count the pulse is terminated. The pulse is provided to a delay element which receives at its input a signal (s) entering, processed within or exiting a semiconductor device. The pulse and periodic sequence of signals are initiated by an edge detector detecting a trigger signal (TRIGGER), which may be the signal (s) being delayed. The sequence of signals is generated by a circuit element, such as a ring oscillator, and the periodicity of the sequence of signals is related to the inherent switching speed of the semiconductor device technology. A plurality of delay circuits are provided in a semiconductor device for individually delaying a plurality of signals entering, processed within and exiting the device. A library of delay circuits may pre-designed, and stored for implementation, as needed, in semiconductor devices.

Abstract: A general purposes architecture for a digital microcomputer, which includes a central processing unit, random access memory, user-defined dedicated functions and an optional programmable read only memory. Instructions are fetched either externally or from the optional ROM. Data can be fetched externally or internally. Each instruction fetched is interpreted by a general-purpose microengine. The architecture is flexible enough to permit the modular addition, deletion and modification of dedicated functions and macroinstructions (including changes in execution timing and decoding), as well as the testing of memory independently from the rest of the architecture.

Abstract: A Gray code counter employs modules of binary bits to form expressions or numbers. The count is sequenced from one expression to the next by changing only one binary bit in one location of an expression. The Gray code counter can be an incrementing counter or an increment/decrement counter. The counter can operate with expressions of several bits, and employs a minimal number of D type flip-flops and logic gates.