Patents by Inventor Jimmy Yong Xiao

Jimmy Yong Xiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9941886
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Grant
    Filed: August 12, 2017
    Date of Patent: April 10, 2018
    Assignee: Casinda Inc.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Publication number: 20170366185
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Application
    Filed: August 12, 2017
    Publication date: December 21, 2017
    Applicant: Casinda, Inc.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Patent number: 9768781
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Grant
    Filed: April 11, 2015
    Date of Patent: September 19, 2017
    Assignee: Casinda, Inc.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran
  • Publication number: 20160301413
    Abstract: An embodiment of the present invention is an identification circuit for generating an identification number (ID). The identification circuit includes a plurality of identification cells each comprising a latch having a first output and a second output that are opposite to each other. The first output and the second output are a function of process variations of the identification circuit. A first buffer and a second buffer are provided on both sides of the latch and connected to the first output and the second output of the latch, respectively.
    Type: Application
    Filed: April 11, 2015
    Publication date: October 13, 2016
    Applicant: CASINDA, INC.
    Inventors: Jimmy Yong Xiao, Surendra Kumar Rathaur, Visvamohan Yegnashankaran