Abstract: A light-emitting element package including a heat conductive layer having a first surface and a second surface, a dielectric layer disposed on the first surface of the heat conductive layer and having an opening exposing the heat conductive layer, two electrodes disposed on the dielectric layer at a side far away from the heat conductive layer, a light-emitting element, and a transparent sealing layer. The light-emitting element is disposed in the opening, carried on the first surface of the heat conductive layer, and electrically coupled to the two electrodes. The transparent sealing layer encapsulates the light-emitting element, the heat conductive layer, and the two electrodes, and exposes part of the two electrodes and the second surface of the heat conductive layer.

Abstract: An image sensing chip package includes an image sensing chip having an image sensor disposed on a circuit side thereof that includes electrical conductive pads. A glue layer is applied to the circuit side and around the image sensor. A flexible film wraps the chip in such a way that an inner surface of the film faces the circuit side of the chip, an opening thereof corresponds to the image sensor, an area of the inner surface near the edges of the opening attaches to the glue layer, an inner end of each of conductors disposed on the inner surface of said film bonds to each of the electrical conductive pads, and an outer end of each of the conductors is exposed to connect with other electrical elements. A light transparent member is disposed on an outer surface of the film to seal the opening of the film.

Abstract: A light-emitting element package including a heat conductive layer having a first surface and a second surface, a dielectric layer disposed on the first surface of the heat conductive layer and having an opening exposing the heat conductive layer, two electrodes disposed on the dielectric layer at a side far away from the heat conductive layer, a light-emitting element, and a transparent sealing layer. The light-emitting element is disposed in the opening, carried on the first surface of the heat conductive layer, and electrically coupled to the two electrodes. The transparent sealing layer encapsulates the light-emitting element, the heat conductive layer, and the two electrodes, and exposes part of the two electrodes and the second surface of the heat conductive layer.

Abstract: An ultra thin image sensing chip package includes an image sensing chip and a flexible and optically transparent film. The chip has an image sensor and a plurality of electrical conductive pads. The flexible and optically transparent film includes a transparent window, and a pattern of conductors formed on a surface thereof and around the transparent window. The film wraps the chip in such a way that the transparent window thereof corresponds to the image sensor of the chip, a sealed space is formed between the transparent window and the image sensor, one end of each of the conductors of the film bonds to each of the electrical conductive pads of the chip, and the other end of each of the conductors of the film is opened so as to electrically connect with other electrical elements.

Abstract: A hole is generated in a substrate. A chip is connected to the substrate by using the chip receiving area of the substrate by using flip chip assembly. The hole is aligned to the chip receiving area of the substrate. Then, a underfill process is performed such that the space between the chip and the substrate will be encapsulated using liquid capsulated material. The liquid capsulated material is injected into the hole from the back side surface of the substrate to the front side surface of the substrate.

Abstract: A chip scale packaging method is used to package a single-sided substrate and one or more semiconductor chips. The nonconductive surface of the substrate is provided with one or more chip-implanting adhesive areas by stenciling. The adhesive areas are provided with one or more through holes. The chips are implanted in the adhesive areas of the substrate such that the active surface of each chip is in contact with the adhesive area, and that the bonding pads of the active surface of the chip are corresponding in location to the through holes. Upon completion of the chip implantation, the substrate and the implanted chips are heated under pressure before the bonding pads are connected with the conductive surface of the substrate by a plurality of metal bonding wires. The chips and the through holes are subsequently provided with a passivation layer. Finally, the conductive surface of the substrate is implanted with a plurality of spherical bonding points in a grid array fashion.