Abstract: A semiconductor device, a manufacturing method therefor, and an electronic apparatus are disclosed. The semiconductor device includes a plurality of transistors distributed in different layers and stacked along a direction perpendicular to a substrate; a word line, penetrating the different layers and extending in the direction perpendicular to the substrate; the transistor includes a first electrode, a gate insulating layer, a semiconductor layer surrounding side walls of the word line, and a protective layer disposed between the semiconductor layer and side walls of the gate insulating layer; the first electrode is provided in a first groove of the semiconductor layer.

Abstract: Provided are a transistor, a 3D stacked semiconductor device, a manufacturing method thereof, and an electronic device. The transistor includes a first electrode and a second electrode arranged on a substrate, a semiconductor layer arranged between the first electrode and the second electrode, and a gate electrode insulated from the semiconductor layer; the first electrode and the second electrode are separated in a first direction parallel to the substrate; the gate electrode extends along a second direction parallel to the substrate, the gate electrode includes a sidewall extending along the second direction and two end surfaces, one end surface is configured to be connected with a word line; at least a portion of the sidewall of the gate electrode is surrounded by a semiconductor layer; the first direction intersects with the second direction.

Abstract: A system for controlling a vehicle, including one or more communication modules and one or more processors operably coupled to the communication modules. The one or more processors are configured to individually or collectively: receive a geo-fence identifier associated with geo-fence information, where the geo-fence identifier uniquely identifies the geo-fence from other geo-fences; obtain one or more activity regulations for the vehicle based on the geo-fence identifier; and control operation of the vehicle according to the one or more activity regulations.

Abstract: A memory cell, an NAND string, a memory cell array, and a data access method. The memory cell comprises a first transistor and a second transistor, the first transistor comprises a first electrode, a second electrode, and two independent gates, i.e., a first gate and a second gate; the second transistor comprises a first electrode, a second electrode, and a gate; the first gate of the first transistor is used as a first word line connecting end; the gate of the second transistor is used as a second word line connecting end; and the second gate of the first transistor is connected to the first electrode of the second transistor.

Abstract: A CXL memory module, a controller, a method for accessing data, and a storage system are provided, which relate to data storage technologies. The CXL memory module includes a controller and a group of memory chips connected to the controller. The controller has a KV interface based on a CXL protocol. The controller is configured to receive a KV instruction sent by an external device through the KV interface, store object-based data into a memory chip or acquire object-based data from a memory chip.

Abstract: A transistor, a 3D memory and a manufacturing method therefor, and an electronic device are provided in the present application. The 3D memory includes a plurality of layers of memory cells stacked in a direction perpendicular to a substrate, and a word line. A memory cell includes a transistor which includes a source and a drain, a gate extending in the direction perpendicular to the substrate, a semiconductor layer surrounding a sidewall of the gate. The semiconductor layer includes a source contact region and a drain contact region arranged at intervals. A channel between the source contact region and the drain contact region is a horizontal channel, and the word line extends in the direction perpendicular to the substrate and penetrates through the memory cells of different layers.

Abstract: A neural network model training method includes: constructing a first neural network architecture, where the first neural network architecture includes M basic unit layers, each of the M basic unit layers includes a plurality of basic units, and the plurality of basic units includes at least a first-type basic unit and a second-type basic unit; and obtaining a target model through training based on datasets respectively corresponding to a plurality of tasks and the first neural network architecture, where the target model includes a plurality of task paths, at least some of the plurality of task paths include N basic units selected from some of the M basic unit layers, and N<M.

Abstract: A CXL memory module, a controller, a method for accessing data, and a storage system are provided, which relate to data storage technologies. The CXL memory module includes a controller and a group of memory chips connected to the controller. The controller has a KV interface based on a CXL protocol. The controller is configured to receive a KV instruction sent by an external device through the KV interface, store object-based data into a memory chip or acquire object-based data from a memory chip.

Abstract: Provided are a semiconductor device and manufacturing method thereof, and an electronic device. The semiconductor device includes multiple storage cells distributed in a direction perpendicular to a base substrate, the multiple storage cells include multiple transistors and capacitors distributed in different layers and stacked in the direction perpendicular to the base substrate; a word line penetrating different layers and extending in the direction perpendicular to the base substrate; a transistor includes a first source/drain electrode, a second source/drain electrode and a semiconductor layer surrounding a sidewall of the word line; first insulating layers and conductive layers alternately distributed in the direction perpendicular to the base substrate, at least one first hole penetrating the different layers; and the second electrode of the capacitor includes an inner electrode disposed in the first hole on the first electrode.

Abstract: A CXL memory module, a memory data swap method and a computer system. The CXL memory module may include a flash memory chip, a memory chip, and a controller chip connected with the flash memory chip and the memory chip. The controller chip is configured to be able to swap a part of data in the memory chip into the flash memory chip.

Abstract: Provided are a semiconductor device and manufacturing method thereof, and an electronic device. The semiconductor device includes multiple storage cells distributed in a direction perpendicular to a base substrate, the multiple storage cells include multiple transistors and capacitors distributed in different layers and stacked in the direction perpendicular to the base substrate; a word line penetrating different layers and extending in the direction perpendicular to the base substrate; a transistor includes a first source/drain electrode, a second source/drain electrode and a semiconductor layer surrounding a sidewall of the word line; first insulating layers and conductive layers alternately distributed in the direction perpendicular to the base substrate, at least one first hole penetrating the different layers; and the second electrode of the capacitor includes an inner electrode disposed in the first hole on the first electrode.

Abstract: A 3D stacked semiconductor device, a manufacturing method therefor, and an electronic equipment are disclosed. The 3D stacked semiconductor device includes a plurality of transistors distributed in different layers and stacked along a direction perpendicular to a base substrate; a word line penetrating through the transistors of the different layers; and a plurality of protective layers corresponding to the plurality of transistors respectively; wherein each transistor includes a semiconductor layer surrounding a side wall of the word line, a gate insulation layer disposed between the side wall of the word line and the semiconductor layer, a plurality of semiconductor layers of the plurality of transistors are disposed at intervals in a direction in which the word line extends; each of the protective layers respectively surrounds and covers an outer side wall of a corresponding semiconductor layer, and two adjacent protective layers are disconnected from each other.

Abstract: An aerial vehicle includes a communication unit configured to receive a wireless signal from a geo-fencing device, and a flight controller configured to generate one or more control signals that cause the aerial vehicle to operate in accordance with a set of flight regulations generated based on the wireless signal. The geo-fencing device is configured not for landing of the aerial vehicle. The set of flight regulations includes rules for controlling at least one of the aerial vehicle, a carrier carried by the aerial vehicle, or a payload of the aerial vehicle.

Abstract: Disclosed is a memory, a method for manufacturing the memory. The memory includes: one or more layers of memory cell arrays stacked in a direction perpendicular to a substrate; a plurality of wordlines that penetrate through one or more layers of the memory cell arrays; and a plurality of bitlines, wherein each memory cell includes a semiconductor layer that surrounds a sidewall of the wordline and extends along the sidewall and each bitline is connected to the semiconductor layers of a column of memory cells in one layer of the memory cell array, wherein the bitline is composed of different branch lines, and the semiconductor layer of each memory cell is connected to two adjacent first branch lines but is not connected to at least a part of the region of the second branch line between the two adjacent first branch lines.

Abstract: A CXL memory module, a memory data swap method and a computer system. The CXL memory module may include a flash memory chip, a memory chip, and a controller chip connected with the flash memory chip and the memory chip. The controller chip is configured to be able to swap a part of data in the memory chip into the flash memory chip.

Abstract: An unmanned aerial vehicle (UAV) includes a sensor configured to detect an indicator of a geo-fencing device; and a flight controller configured to generate one or more signals that cause the UAV to operate in accordance with a set of flight regulations that are generated based on the detected indicator of the geo-fencing device.

Abstract: A system for controlling a vehicle, including one or more communication modules and one or more processors operably coupled to the communication modules. The one or more processors are configured to individually or collectively: receive a geo-fence identifier associated with geo-fence information, where the geo-fence identifier uniquely identifies the geo-fence from other geo-fences; obtain one or more activity regulations for the vehicle based on the geo-fence identifier; and control operation of the vehicle according to the one or more activity regulations.

Abstract: A transistor, a 3D memory and a manufacturing method therefor, and an electronic device are provided in the present application. The 3D memory includes a plurality of layers of memory cells stacked in a direction perpendicular to a substrate, and a word line. A memory cell includes a transistor which includes a source and a drain, a gate extending in the direction perpendicular to the substrate, a semiconductor layer surrounding a sidewall of the gate. The semiconductor layer includes a source contact region and a drain contact region arranged at intervals. A channel between the source contact region and the drain contact region is a horizontal channel, and the word line extends in the direction perpendicular to the substrate and penetrates through the memory cells of different layers.

Abstract: A method for regulating an unmanned aerial vehicle (UAV) includes receiving a UAV identifier and one or more types of contextual information broadcasted by the UAV. The UAV identifier uniquely identifies the UAV from other UAVs. The one or more types of contextual information includes at least geographical information of the UAV. The method further includes authenticating, via an authentication device, an identity of the UAV based on the UAV identifier to determine whether the UAV is authorized for operation, and transmitting a signal to a remote device in response to determining whether the UAV is authorized for operation.

Abstract: Provided are a computational storage system, computational storage processor, solid-state drive (SSD) and data storing method. The method may include receiving a first storing instruction based on a storage object, generating a second storing instruction based on a flash memory address according to information carried by the first storing instruction and SSD resource information maintained locally, and sending the generated second storing instruction to the SSD. The SSD resource information may include resource occupation information in the SSD. Generating the second storing instruction may include parsing an identification of a storage object, data length information and a starting source address of entire data, allocating a flash memory address or addresses in one or more SSDs for storing data of the storage object according to the data length information and the resource occupancy information in the SSD, and generating the second storing instructions for each SSD.