Patents by Inventor Jin Fujihara

Jin Fujihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9153465
    Abstract: A substrate stage for mounting a substrate thereon includes a peripheral stage member on which a peripheral substrate portion of the substrate may be mounted, the peripheral substrate portion controlling a temperature of the peripheral substrate portion, a central stage member on which a central substrate portion of the substrate may be mounted, the central substrate portion controlling a temperature of the central substrate portion, and a support base that supports the peripheral stage member and the central stage member. A gap is formed between the peripheral stage member and the central stage member to keep the peripheral stage member and the central stage member from coming in contact with each other.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: October 6, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Masaya Odagiri, Yusuke Muraki, Jin Fujihara
  • Publication number: 20150113826
    Abstract: A peripheral member having the temperature thereof controlled to a first temperature; a center member, which is not in contact with the peripheral member and has the temperature thereof controlled to a second temperature; a periphery placing member having the peripheral portion of the wafer placed thereon; and a center placing member having the center portion of the wafer W placed thereon. The periphery placing member and the center placing member respectively have shapes different from those of the peripheral member and the center member so as to correspond to processing distribution. A portion of the periphery placing member is heat-insulated by having a gap formed between the portion and the center member. A portion of the center placing member is heat-insulated by having a gap formed between the portion and the peripheral member.
    Type: Application
    Filed: May 21, 2013
    Publication date: April 30, 2015
    Inventors: Masaya Odagiri, Jin Fujihara
  • Patent number: 8741065
    Abstract: A substrate processing apparatus includes a substrate stage for mounting two or more substrates thereon. The substrate stage includes substrate stage units. Each of the substrate stage units includes a central temperature control flow path for controlling the temperature of a central portion of each of the substrates and a peripheral temperature control flow path for controlling the temperature of a peripheral portion of each of the substrates. The central temperature control flow path and the peripheral temperature control flow path are formed independently of each other. The substrate stage includes one temperature control medium inlet port for introducing therethrough a temperature control medium into the peripheral temperature control flow path and temperature control medium outlet ports for discharging therethrough the temperature control medium from the peripheral temperature control flow path. The number of the temperature control medium outlet ports corresponds to the number of substrates.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: June 3, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masaya Odagiri, Yusuke Muraki, Jin Fujihara
  • Patent number: 8394720
    Abstract: A plasma processing method includes modifying a resist pattern of the substrate; and trimming the modified resist pattern through a plasma etching. The modifying includes: supplying the processing gas for modification from the processing gas supply unit to the inside of the processing chamber while the substrate having a surface on which the resist pattern is formed is mounted on the lower electrode; supplying the high frequency power from the high frequency power supply to generate a plasma of the processing gas for modification; and supplying the negative DC voltage from the DC power supply to the upper electrode.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: March 12, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Jin Fujihara
  • Publication number: 20120000612
    Abstract: A substrate stage for mounting a substrate thereon includes a peripheral stage member on which a peripheral substrate portion of the substrate may be mounted, the peripheral substrate portion controlling a temperature of the peripheral substrate portion, a central stage member on which a central substrate portion of the substrate may be mounted, the central substrate portion controlling a temperature of the central substrate portion, and a support base that supports the peripheral stage member and the central stage member. A gap is formed between the peripheral stage member and the central stage member to keep the peripheral stage member and the central stage member from coming in contact with each other.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masaya ODAGIRI, Yusuke MURAKI, Jin FUJIHARA
  • Publication number: 20120000629
    Abstract: A substrate processing apparatus includes a substrate stage for mounting two or more substrates thereon. The substrate stage includes substrate stage units. Each of the substrate stage units includes a central temperature control flow path for controlling the temperature of a central portion of each of the substrates and a peripheral temperature control flow path for controlling the temperature of a peripheral portion of each of the substrates. The central temperature control flow path and the peripheral temperature control flow path are formed independently of each other. The substrate stage includes one temperature control medium inlet port for introducing therethrough a temperature control medium into the peripheral temperature control flow path and temperature control medium outlet ports for discharging therethrough the temperature control medium from the peripheral temperature control flow path. The number of the temperature control medium outlet ports corresponds to the number of substrates.
    Type: Application
    Filed: June 29, 2011
    Publication date: January 5, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masaya ODAGIRI, Yusuke MURAKI, Jin FUJIHARA
  • Publication number: 20100055911
    Abstract: A plasma processing method includes modifying a resist pattern of the substrate; and trimming the modified resist pattern through a plasma etching. The modifying includes: supplying the processing gas for modification from the processing gas supply unit to the inside of the processing chamber while the substrate having a surface on which the resist pattern is formed is mounted on the lower electrode; supplying the high frequency power from the high frequency power supply to generate a plasma of the processing gas for modification; and supplying the negative DC voltage from the DC power supply to the upper electrode.
    Type: Application
    Filed: September 3, 2009
    Publication date: March 4, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Jin Fujihara
  • Patent number: 7416676
    Abstract: A plasma etching method for etching an etching target layer of a silicon layer through a mask of a silicon oxide film includes the following sequential steps of forming an opening in the silicon oxide film, wherein an opening dimension of a portion between a top and a bottom surface of the mask is enlarged compared to opening dimensions of the top and the bottom surface of the mask and etching the silicon layer by using a halogen containing gas. A gaseous mixture containing HBr gas, NF3 gas and O2 gas is used as the halogen containing gas. A hole or a trench having an opening diameter or an opening width equal to or smaller than 0.2 ?m is formed in the etching target layer. Further, a hole or a trench having an aspect ratio equal to or greater than forty is formed in the etching target layer.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: August 26, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Jin Fujihara, Katsumi Horiguchi
  • Publication number: 20060180571
    Abstract: A plasma etching method for etching an etching target layer of a silicon layer through a mask of a silicon oxide film includes the following sequential steps of forming an opening in the silicon oxide film, wherein an opening dimension of a portion between a top and a bottom surface of the mask is enlarged compared to opening dimensions of the top and the bottom surface of the mask and etching the silicon layer by using a halogen containing gas. A gaseous mixture containing HBr gas, NF3 gas and O2 gas is used as the halogen containing gas. A hole or a trench having an opening diameter or an opening width equal to or smaller than 0.2 ?m is formed in the etching target layer. Further, a hole or a trench having an aspect ratio equal to or greater than forty is formed in the etching target layer.
    Type: Application
    Filed: February 15, 2006
    Publication date: August 17, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Jin Fujihara, Katsumi Horiguchi