Abstract: This application relates to an independent active electromagnetic interference filter module. In one aspect, the filter module includes a first element group including a noise sensing unit provided to sense electromagnetic noise, and a second element group including a compensating unit provided to generate a compensation signal for the electromagnetic noise. The first group and the second group may be respectively mounted on different substrates. According to some embodiments, the filter module can reduce a volume of each element constituting an electromagnetic interference filter module, implement a single modularization of a compact structure. The filter module can also improve electromagnetic interference noise reduction performance and a manufacturing method thereof.

Abstract: This application relates to an active current compensation device which actively compensates for a noise occurring in a common mode in each of two or more high-current paths. In one aspect, the active current compensation device includes a sensing unit configured to generate an output signal corresponding to a common-mode noise current on each of the two or more high-current paths, and an amplification unit configured to amplify the output signal to generate an amplified current. The device may also include a compensation unit configured to generate a compensation current on the basis of the amplified current and allow the compensation current to flow to each of the two or more high-current paths, and a malfunction detection unit configured to detect a malfunction of the amplification unit. The malfunction detection unit and at least a portion of the amplification unit may be embedded in one integrated circuit (IC) chip.

Abstract: This application relates to an active compensating device. In one aspect, the active compensating device includes two or more high current paths through which a second current supplied by a second device is transmitted to a first device, and a sensing unit sensing the first current on the high current paths and generating an output signal corresponding to the first current. The device may also include an amplifying unit amplifying the output signal of the sensing unit to generate an amplified current and a compensating unit generating a compensation current based on the amplified current and allowing the compensation current to flow to each of the two or more high current paths. The device may further include a first anti-disturbance unit connected in parallel to output terminals of the sensing unit, and a second anti-disturbance unit connected in parallel to input terminals of the compensating unit.

Abstract: Provided is a current compensation system for solar generators for compensating for noise using an active electromagnetic interference (EMI) filter. An inverting system for solar generators includes a solar inverter converting DC voltage to AC voltage, an EMI filter unit including an active EMI filter to reduce noise corresponding to the AC voltage, a power grid, and at least two or more through lines passing a second current from the power grid to the solar inverter and passing through the EMI filter unit, wherein the active EMI filter includes a noise sensing unit sensing a first current on the at least two or more through lines and generating an output signal corresponding to the first current, an active circuit unit amplifying the output signal to generate an amplified signal, a compensation unit generating a compensation current based on the amplified signal, and a transmission unit providing a path through which the compensation current flows to each of the at least two large current paths.

Abstract: A low-voltage plasma ionizer is proposed. The ionizer may include a resonator module comprising a metal plate and configured to generate plasma by using an electric field, wherein the metal plate comprises a long side extending in a longitudinal direction, a short side crossing the long side, and a slot extending in the longitudinal direction. The ionizer may also include a source generator connected to the resonator module, and configured to supply a signal to the resonator module to generate plasma including plasma ions around the metal plate. The ionizer may further include a fan placed in an XY plane, and configured to move the plasma ion in a direction crossing the XY plane.

Abstract: This application relates to an active current compensation device which actively compensates for a noise occurring in a common mode in each of two or more high-current paths. In one aspect, the active current compensation device includes a sensing unit configured to generate an output signal corresponding to a common-mode noise current on each of the two or more high-current paths, and an amplification unit configured to amplify the output signal to generate an amplified current. The device may also include a compensation unit configured to generate a compensation current on the basis of the amplified current and allow the compensation current to flow to each of the two or more high-current paths, and a malfunction detection unit configured to detect a malfunction of the amplification unit. The malfunction detection unit and at least a portion of the amplification unit may be embedded in one integrated circuit (IC) chip.

Abstract: A camera module includes a substrate, an image sensor disposed on the substrate, a housing to accommodate the image sensor, a filter configured to block an infrared wavelength of light incident on the image sensor and disposed on the housing, a gap maintaining member to maintain a gap between the substrate and the bottom housing, and a sealing member to connect the substrate to the housing and to surround the image sensor.

Abstract: This application relates to an active compensating device. In one aspect, the active compensating device includes two or more high current paths through which a second current supplied by a second device is transmitted to a first device, and a sensing unit sensing the first current on the high current paths and generating an output signal corresponding to the first current. The device may also include an amplifying unit amplifying the output signal of the sensing unit to generate an amplified current and a compensating unit generating a compensation current based on the amplified current and allowing the compensation current to flow to each of the two or more high current paths. The device may further include a first anti-disturbance unit connected in parallel to output terminals of the sensing unit, and a second anti-disturbance unit connected in parallel to input terminals of the compensating unit.

Abstract: This application relates to an independent active electromagnetic interference filter module. In one aspect, the filter module includes a first element group including a noise sensing unit provided to sense electromagnetic noise, and a second element group including a compensating unit provided to generate a compensation signal for the electromagnetic noise. The first group and the second group may be respectively mounted on different substrates. According to some embodiments, the filter module can reduce a volume of each element constituting an electromagnetic interference filter module, implement a single modularization of a compact structure. The filter module can also improve electromagnetic interference noise reduction performance and a manufacturing method thereof.

Abstract: The present disclosure relates to an electromagnetic interference (EMI) filter for preventing noise emitted from a power line cable, and an isolated type active EMI filter having no additional elements on a power line. The EMI filter includes a common-mode (CM) choke disposed on a power source side, a Y-cap disposed on an EMI source side, and a sensing winding configured to sense a current. The EMI filter also includes an amplifier configured to amplify the noise current, and a transformer configured to inject a signal of the secondary coil into the Y-cap as a compensation signal.

Abstract: A method of testing semiconductor packages, which performs an electrical test on the semiconductor packages after receiving the semiconductor packages into insert pockets of a test tray and connecting with sockets of a tester by using pusher units each including a heater, includes receiving temperature information of the semiconductor packages from the tester while testing the semiconductor packages, calculating an overall average temperature of the semiconductor packages from the received temperature information, and individually controlling operations of heaters of the pusher units based on difference values between the overall average temperature and individual temperatures of the semiconductor packages.

Abstract: A camera module includes a substrate, an image sensor disposed on the substrate, a housing to accommodate the image sensor, a filter configured to block an infrared wavelength of light incident on the image sensor and disposed on the housing, a gap maintaining member to maintain a gap between the substrate and the bottom housing, and a sealing member to connect the substrate to the housing and to surround the image sensor.

Abstract: A method of testing semiconductor packages, which performs an electrical test on the semiconductor packages after receiving the semiconductor packages into insert pockets of a test tray and connecting with sockets of a tester by using pusher units each including a heater, includes receiving temperature information of the semiconductor packages from the tester while testing the semiconductor packages, calculating an overall average temperature of the semiconductor packages from the received temperature information, and individually controlling operations of heaters of the pusher units based on difference values between the overall average temperature and individual temperatures of the semiconductor packages.

Abstract: A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing data output from the memory core and outputting serialized data to the controller via the data port. The controller generates the first selection signal based on at least one of the voltage signal and the serialized data.

Abstract: A semiconductor device includes a selection circuit and a phase detector. The selection circuit, in response to a first selection signal output from a controller, outputs as a timing signal a first clock signal output from the controller or an output signal of a PLL using the first clock signal as a first input. The phase detector generates a voltage signal indicating a phase difference between a second clock signal output from the controller and the timing signal output from the selection circuit. The semiconductor device further includes a data port, a memory core storing data, and a serializer, in response to the timing signal output from the selection circuit, serializing the data output from the memory core and outputting serialized data to the controller via the data port. The first selection signal is generated by the controller based on at least one of the voltage signal and the data output to the controller via the data port.

Abstract: A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode.

Abstract: A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode.

Abstract: An AC-coupling phase interpolator and a DLL using the same are provided. The AC-coupling phase interpolator includes a coupling capacitor generating and outputting a coupling signal by AC-coupling to an interpolation signal obtained by phase-interpolating an input signal. Thereby, it is possible to correct duty of an input signal and adjust the level of an output signal.

Abstract: A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode.

Abstract: A memory device is configured to operate in first and second data input/output modes. The memory device includes a first electrode pad, a second electrode pad, a clock signal line, a first switching unit, and a second switching unit. The clock signal line is configured to transmit a clock to an integrated circuit inside the memory device. The first switching unit switches to electrically connect the first electrode pad and the clock signal line in response to a control signal occurring for the first data input/output mode. The second switching unit switches to electrically connect the second electrode pad and the clock signal line in response to an inverse signal of the control signal occurring for the second data input/output mode.