Abstract: A semiconductor device may include a via hole, a first electrode, a second electrode and a first protecting insulation layer. The via hole may be formed to penetrate a substrate. The first electrode may include an electrode segment formed on a surface of the via hole. The second electrode may be formed on the first electrode along the surface of the via hole. The second electrode may include two ends that are positioned below a surface of the substrate. The first protecting insulation layer may be formed on the second electrode along the surface of the via hole. The first protecting insulation layer may include both ends that upwardly protrude from the both ends of the second electrode.

Abstract: A semiconductor device may include a via hole, a first electrode, a second electrode and a first protecting insulation layer. The via hole may be formed to penetrate a substrate. The first electrode may include an electrode segment formed on a surface of the via hole. The second electrode may be formed on the first electrode along the surface of the via hole. The second electrode may include two ends that are positioned below a surface of the substrate. The first protecting insulation layer may be formed on the second electrode along the surface of the via hole. The first protecting insulation layer may include both ends that upwardly protrude from the both ends of the second electrode.

Abstract: A semiconductor device may include a via hole, a first electrode, a second electrode and a first protecting insulation layer. The via hole may be formed to penetrate a substrate. The first electrode may include an electrode segment formed on a surface of the via hole. The second electrode may be formed on the first electrode along the surface of the via hole. The second electrode may include two ends that are positioned below a surface of the substrate. The first protecting insulation layer may be formed on the second electrode along the surface of the via hole. The first protecting insulation layer may include both ends that upwardly protrude from the both ends of the second electrode.

Abstract: A method for manufacturing an image sensing device includes forming a first photoelectric conversion region in a semiconductor substrate, forming a recess region to extend in a direction from a surface of the semiconductor substrate toward an inside of the semiconductor substrate, arranging a mask in a portion of the recess region, forming a second photoelectric conversion region through the recess region, and forming a recess gate in the recess region. A thickness of the second photoelectric conversion region is based on a depth of the recess gate that is measured from the surface of the semiconductor substrate to a bottom surface of the recess gate.

Abstract: A semiconductor device may include a via hole, a first electrode, a second electrode and a first protecting insulation layer. The via hole may be formed to penetrate a substrate. The first electrode may include an electrode segment formed on a surface of the via hole. The second electrode may be formed on the first electrode along the surface of the via hole. The second electrode may include two ends that are positioned below a surface of the substrate. The first protecting insulation layer may be formed on the second electrode along the surface of the via hole. The first protecting insulation layer may include both ends that upwardly protrude from the both ends of the second electrode.

Abstract: A control method of a cooking apparatus. The control method of the cooking apparatus includes controlling an operation of the water supply pump to supply water to the steam generator, controlling an operation of the water supply pump for a period of time to additionally supply water to the steam generator when a level of water supplied to the steam generator reaches a position. The method includes controlling an operation of a drain pump to discharge the water from the steam generator when the period of time expires, and respectively controlling an operation of a steam heater installed in the steam generator and a bottom heater installed on a bottom surface of the cooking apparatus, when the level of the water in the steam generator reaches the position at which the water is discharged from the steam generator.

Abstract: A control method of a cooking apparatus. The control method of the cooking apparatus includes controlling an operation of the water supply pump to supply water to the steam generator, controlling an operation of the water supply pump for a period of time to additionally supply water to the steam generator when a level of water supplied to the steam generator reaches a position. The method includes controlling an operation of a drain pump to discharge the water from the steam generator when the period of time expires, and respectively controlling an operation of a steam heater installed in the steam generator and a bottom heater installed on a bottom surface of the cooking apparatus, when the level of the water in the steam generator reaches the position at which the water is discharged from the steam generator.

Abstract: There is provided a cooker including: a cooking room; a steam generator configured to generate steam, and to supply the steam to the cooking room; a water level sensor configured to sense a water level of a cleaning solution stored in the inside of the steam generator; a supply apparatus including a storage unit configured to accommodate the cleaning solution, a supply pump configured to supply the cleaning solution accommodated in the storage unit to the steam generator, and a drain pump configured to supply the cleaning solution remaining in the steam generator to the storage unit; and a controller configured to control operations of the supply pump and the drain pump, wherein the controller operates the supply pump in a washing mode, operates the drain pump when the cleaning solution is fully filled in the steam generator, and again operates the supply pump when the cleaning solution is removed from the steam generator.

Abstract: Provided is a cooking appliance having an improved structure in which superheated steam is capable of being used during a cooking operation. The cooking appliance supplies superheated steam while food is cooked, and includes: a main body, a front of which is opened and in which a cooking compartment is disposed; a heating chamber disposed in the main body to be in communication with the cooking compartment; a steam generator disposed to generate steam sprayed into the heating chamber; and a convection heater disposed in the heating chamber to heat the heating chamber and the cooking compartment. The convection heater heats steam discharged from the steam generator, and the steam discharged from the steam generator, in a superheated steam state, is sprayed into the heating chamber and supplied into the cooking compartment.

Abstract: A memory device may include a plurality of memory cells; one or more backup memory cells; a test circuit suitable for performing a backup operation and a test operation to a test target cell selected among the plurality of memory cells; and a control circuit suitable for accessing the backup memory cells instead of the test target cell during the performance of the test operation after completion of the backup operation for the selected test target cell, wherein, during the backup operation, the test circuit controls the control circuit to copy an original data of the test target cell to a corresponding backup memory cell selected among the backup memory cells, and wherein, during the test operation, the test circuit determines whether the test target cell is a pass or a fail.

Abstract: A control method of a cooking apparatus. The control method of the cooking apparatus includes controlling an operation of the water supply pump to supply water to the steam generator, controlling an operation of the water supply pump for a period of time to additionally supply water to the steam generator when a level of water supplied to the steam generator reaches a position. The method includes controlling an operation of a drain pump to discharge the water from the steam generator when the period of time expires, and respectively controlling an operation of a steam heater installed in the steam generator and a bottom heater installed on a bottom surface of the cooking apparatus, when the level of the water in the steam generator reaches the position at which the water is discharged from the steam generator.

Abstract: A semiconductor device includes a group control circuit configured to generate a specified address and a control code in response to a row address and an active command, a comparison control signal generation circuit configured to generate a comparison control signal in response to the active command and a set code, and a target address generation circuit configured to output the specified address as a target address in response to the control code and the comparison control signal.

Abstract: Provided are a semiconductor device including an error correction code circuit and a driving method thereof. The semiconductor device includes a plurality of normal mats including a plurality of memory cells and connected to data lines, a plurality of dummy mats arranged in specific areas of the plurality of normal mats and inputting/outputting parity bits through parity lines of a specific circuit, a plurality of free ECC (Error Correction Code) calculation circuits that perform ECC calculation corresponding to data applied through the data lines and the parity lines, and a main ECC calculation circuit that combines data applied from the plurality of free ECC calculation circuits with one another and performs ECC calculation.

Abstract: A semiconductor device includes a group control circuit configured to generate a specified address and a control code in response to a row address and an active command, a comparison control signal generation circuit configured to generate a comparison control signal in response to the active command and a set code, and a target address generation circuit configured to output the specified address as a target address in response to the control code and the comparison control signal.

Abstract: A semiconductor apparatus includes a memory region; a fuse array including a plurality of fuse groups, each fuse group being configured to store a failed address of the memory region; a remaining-fuse information storage unit configured to store remaining-fuse information on a fuse group that includes a fuse corresponding to the failed address among the plurality of fuse groups; and a control unit configured to perform a control operation for updating the remaining-fuse information for the fuse group that includes a fuse corresponding to the failed address among the plurality of fuse groups and for storing the failed address when the failed address is detected.

Abstract: A semiconductor apparatus includes a fuse array configured to store word line failure information, a redundancy latch section, and a redundancy control block configured to store, in the redundancy latch section, word line order information generated according to the word line failure information.

Abstract: An oven, which both satisfies heat insulating and cooling of a door by adjusting an air flow in channels formed in the door. The oven includes a plurality of channels provided in a door, into which external air flows, accompanied with air discharged by a discharge duct, such that the air flows in the plurality of the channels, and a flow conversion part formed above at least one of the plurality of the channels for stagnating the flow of air. Since the door insulates a cooking chamber from heat and is cooled using a difference of pressures between upper and lower portions of the door, the oven concurrently satisfies conflicting two requirements, such as heat insulating and cooling of the door.

Abstract: A memory device may include a plurality of memory cells; one or more backup memory cells; a test circuit suitable for performing a backup operation and a test operation to a test target cell selected among the plurality of memory cells; and a control circuit suitable for accessing the backup memory cells instead of the test target cell during the performance of the test operation after completion of the backup operation for the selected test target cell, wherein, during the backup operation, the test circuit controls the control circuit to copy an original data of the test target cell to a corresponding backup memory cell selected among the backup memory cells, and wherein, during the test operation, the test circuit determines whether the test target cell is a as a pass or a fail.

Abstract: A semiconductor apparatus includes a memory region; a fuse array including a plurality of fuse groups, each fuse group being configured to store a failed address of the memory region; a remaining-fuse information storage unit configured to store remaining-fuse information on a fuse group that includes a fuse corresponding to the failed address among the plurality of fuse groups; and a control unit configured to perform a control operation for updating the remaining-fuse information for the fuse group that includes a fuse corresponding to the failed address among the plurality of fuse groups and for storing the failed address when the failed address is detected.