Patents by Inventor Jin-Hee Ma

Jin-Hee Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240354018
    Abstract: The present disclosure provides methods and apparatuses for a storage system. In some embodiments, a storage system includes a plurality of storage devices and a host device. Each storage device of the plurality of storage devices includes a plurality of blocks classified into first type blocks, second type blocks, and third type blocks, and is configured to generate internal state information items indicating information on a first number of first type blocks, a second number of second type blocks, and a third number of third type blocks. The host device is configured to receive, from the plurality of storage devices, the internal state information items, generate target state information such that the plurality of storage devices include a same number or substantially same number of first type blocks, based on the internal state information items, and transmit, to the plurality of storage devices, the target state information.
    Type: Application
    Filed: October 10, 2023
    Publication date: October 24, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Hee MA, Kyuho SON, Yunho YANG, Sangyoon OH, Wonchul LEE, Jaigyun LIM
  • Patent number: 12118233
    Abstract: Disclosed is an operation method including generating RAID parity data based on first data in response to an RAID enable request and a first write request, the RAID enable request and the first write request being received from an external host, the RAID enable request including a first stream identifier and a RAID enable indication, and the first write request including the first stream identifier and the first data, storing the first data and the RAID parity data based on the first stream identifier, storing second data based on a second stream identifier in response to receiving a second write request from the external host, the second write request including the second stream identifier and the second data, and receiving an RAID disable request from the external host, the RAID disable request including the first stream identifier and a RAID disable indication.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: October 15, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee Ma, Duckho Bae, Youngjin Yu
  • Publication number: 20240319890
    Abstract: Disclosed is a storage system which includes a random access memory, storage devices, and a processing unit that controls the random access memory and the storage devices. Each of the plurality of storage devices includes a first storage area and a second storage area. The processing unit assigns a zone to the first storage areas of the storage devices. The processing unit assigns RAID stripes to the zone, performs a write of sequential data, which are based on sequential logical addresses, with respect to each of the RAID stripes, and performs a write of a parity corresponding to the write of the sequential data after the write of the sequential data is completed. The processing unit writes an intermediate parity corresponding to the parity in the second storage area of at least one storage device among the storage devices while performing the write of the sequential data.
    Type: Application
    Filed: September 14, 2023
    Publication date: September 26, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jaigyun LIM, Jin-Hee MA, Kyuho SON, Sangyoon OH, Wonchul LEE
  • Publication number: 20240211388
    Abstract: Disclosed is an electronic device including a processor configured to receive a command requesting an operation for a plurality of group zones from a host, transmit a completion response to the command to the host, and perform a background operation for the command; and a plurality of storage devices, the processor configured to control the plurality of storage devices, each of the plurality of group zones including a plurality of zones included in one or more storage devices among the plurality of storage devices, and the processor being configured to perform the background operation including generating a plurality of distribution commands for each of the plurality of storage devices from the command, and issuing one or more distribution commands among the plurality of distribution commands to one or more storage devices corresponding to the one or more distribution commands, respectively.
    Type: Application
    Filed: June 23, 2023
    Publication date: June 27, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee MA, Kyuho SON, Sangyoon OH, Wonchul LEE, Jaigyun LIM
  • Publication number: 20230153019
    Abstract: Disclosed is an operation method including generating RAID parity data based on first data in response to an RAID enable request and a first write request, the RAID enable request and the first write request being received from an external host, the RAID enable request including a first stream identifier and a RAID enable indication, and the first write request including the first stream identifier and the first data, storing the first data and the RAID parity data based on the first stream identifier, storing second data based on a second stream identifier in response to receiving a second write request from the external host, the second write request including the second stream identifier and the second data, and receiving an RAID disable request from the external host, the RAID disable request including the first stream identifier and a RAID disable indication.
    Type: Application
    Filed: July 14, 2022
    Publication date: May 18, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee MA, Duckho BAE, Youngjin YU
  • Patent number: 11625330
    Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 11, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee Ma, Sukhee Lee, Jisoo Kim
  • Patent number: 11579779
    Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: February 14, 2023
    Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
  • Publication number: 20220188236
    Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.
    Type: Application
    Filed: March 7, 2022
    Publication date: June 16, 2022
    Inventors: JIN-HEE MA, SUKHEE LEE, JISOO KIM
  • Patent number: 11301388
    Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: April 12, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee Ma, Sukhee Lee, Jisoo Kim
  • Publication number: 20210382635
    Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 9, 2021
    Inventors: JIN-HEE MA, SUNGKUG CHO, SANG-HOON CHOI
  • Patent number: 11157180
    Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: October 26, 2021
    Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
  • Publication number: 20200192584
    Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
    Type: Application
    Filed: February 25, 2020
    Publication date: June 18, 2020
    Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
  • Publication number: 20200110708
    Abstract: A storage device includes a nonvolatile memory device, a memory controller, and a buffer memory. The memory controller determines a first memory block of the nonvolatile memory device, which is targeted for a read reclaim operation, and reads target data from a target area of the first memory block. The target data are stored in the buffer memory. The memory controller reads at least a portion of the target data stored in the buffer memory in response to a read request corresponding to at least a portion of the target area.
    Type: Application
    Filed: July 9, 2019
    Publication date: April 9, 2020
    Inventors: JIN-HEE MA, SUKHEE LEE, JISOO KIM
  • Patent number: 10592130
    Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: March 17, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee Ma, Sungkug Cho, Sang-Hoon Choi
  • Publication number: 20180088841
    Abstract: Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
    Type: Application
    Filed: May 26, 2017
    Publication date: March 29, 2018
    Inventors: JIN-HEE MA, SUNGKUG CHO, SANG-HOON CHOI
  • Patent number: 9318216
    Abstract: A multilevel cell (MLC) nonvolatile memory system including a plurality of memory cells each cell storing first bit data and second bit data, and a controller programming the plurality of memory cells on a page-by-page basis, the controller programming original data to an original block and programming copy data that is the same as the original data to a mirroring block, wherein first bit page data and second bit page data of the original data are programmed to memory cells connected to the same word line, but the first bit page data and second bit page data of the copy data are programmed to memory cells connected to different word lines.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: April 19, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Hee Ma, Da-Woon Jung, Byung-Hei Jun
  • Publication number: 20150277792
    Abstract: A method of controlling a non-volatile memory device comprises detecting a bad page in a first block of the non-volatile memory device, and as a consequence of detecting the bad page, copying meta data stored in valid pages of the first block and original meta data corresponding to the bad page, programming the copied meta data to a second block of the non-volatile memory device, erasing the first block, and thereafter programming user data in the first block.
    Type: Application
    Filed: July 23, 2014
    Publication date: October 1, 2015
    Inventors: JIN-HEE MA, SE-HWAN LEE, DA-WOON JUNG, MOON-WOOK OH
  • Publication number: 20140208002
    Abstract: A multilevel cell (MLC) nonvolatile memory system including a plurality of memory cells each cell storing first bit data and second bit data, and a controller programming the plurality of memory cells on a page-by-page basis, the controller programming original data to an original block and programming copy data that is the same as the original data to a mirroring block, wherein first bit page data and second bit page data of the original data are programmed to memory cells connected to the same word line, but the first bit page data and second bit page data of the copy data are programmed to memory cells connected to different word lines.
    Type: Application
    Filed: March 13, 2013
    Publication date: July 24, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Hee Ma, Da-Woon Jung, Byung-Hei Jun