Patents by Inventor Jin Ho Gwon

Jin Ho Gwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240137511
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY, HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jin-Ho LEE, Jung-Won KANG, Hyunsuk KO, Sung-Chang LIM, Dong-San JUN, Ha-Hyun LEE, Seung-Hyun CHO, Hui-Yong KIM, Hae-Chul CHOI, Dae-Hyeok GWON, Jae-Gon KIM, A-Ram BACK
  • Publication number: 20240136510
    Abstract: A positive electrode active material including a first lithium composite oxide particle including a secondary particle formed by aggregation of one or more primary particles, and a coating oxide occupying at least a part of at least one of surfaces of the secondary particle, grain boundaries between the primary particles, or surfaces of the primary particles, the positive electrode active material satisfying an equation of 1.3?a/b?3.0, wherein a represents a max peak intensity at 2theta=44.75° to 44.80° and b represents a max peak intensity at 2theta=45.3° to 45.6° in X-ray diffraction (XRD) analysis using Cu K? radiation.
    Type: Application
    Filed: May 21, 2023
    Publication date: April 25, 2024
    Inventors: Yu Gyeong CHUN, Moon Ho CHOI, Yoon Young CHOI, Jong Seung SHIN, Yong Hwan GWON, Jin Ho BAE, Ji Won KIM, Sang Hyeok KIM
  • Patent number: 11917148
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 27, 2024
    Assignees: Electronics And Telecommunications Research Institute, Industry-University Cooperation Foundation Korea Aerospace University, Hanbat National University Industry-Academic Cooperation Foundation
    Inventors: Jin-Ho Lee, Jung-Won Kang, Hyunsuk Ko, Sung-Chang Lim, Dong-San Jun, Ha-Hyun Lee, Seung-Hyun Cho, Hui-Yong Kim, Hae-Chul Choi, Dae-Hyeok Gwon, Jae-Gon Kim, A-Ram Back
  • Patent number: 11076759
    Abstract: A wearable device according to an embodiment comprises: a substrate; a light-emitting unit disposed on the substrate; a light-receiving unit disposed on the substrate and spaced apart at a predetermined distance from the light-emitting unit; and a first reflection part disposed on the substrate adjacent to the light-emitting unit so as to reflect light emitted from the light-emitting unit.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: August 3, 2021
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Chul Kim, Sang Hun Lee, Jin Ho Gwon
  • Patent number: 10617360
    Abstract: An apparatus for measuring a bio-signal includes: a light source emitting a predetermined amount of light into a human body; a light receiving unit receiving at least some of the predetermined amount of light; and a cover, which is touchable by the human body, protecting the light source and the light receiving unit. The light source and the cover are arranged such that the light source and the cover are separated by a first gap, the light receiving unit and the cover are arranged such that the light receiving unit and the cover are separated by a second gap, and the first gap is less than the second gap.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 14, 2020
    Assignees: Hyundai Motor Company, LG Innotek Co., LTd.
    Inventors: Seul Ki Jeon, Nam Woong Hur, Eung Hwan Kim, Jin Ho Gwon, Sang Hun Lee
  • Patent number: 10454159
    Abstract: An antenna system using a motion sensor includes an antenna having a plurality of axes within a smart device, whereby motion sensor sensing axis information is generated by movement or rotation of the plurality of axes of the antenna, and a controller for controlling the information sensed by the motion sensor and a strength of a signal of the antenna having the plurality of axes received in real time.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: October 22, 2019
    Assignees: HYUNDAI MOTOR COMPANY, LG INNOTEK CO., LTD.
    Inventors: Seul Ki Jeon, Hyun Sang Kim, Nam Woong Hur, Jin Ho Gwon
  • Publication number: 20190029521
    Abstract: A wearable device according to an embodiment comprises: a substrate; a light-emitting unit disposed on the substrate; a light-receiving unit disposed on the substrate and spaced apart at a predetermined distance from the light-emitting unit; and a first reflection part disposed on the substrate adjacent to the light-emitting unit so as to reflect light emitted from the light-emitting unit.
    Type: Application
    Filed: December 26, 2016
    Publication date: January 31, 2019
    Inventors: CHUL KIM, SANG HUN LEE, JIN HO GWON
  • Patent number: 10069022
    Abstract: The present invention comprises: a supporting substrate; a rear electrode layer disposed on the supporting substrate; a light absorption layer disposed on the rear electrode layer; a front electrode layer disposed on the light absorption layer; and a first penetrating groove penetrating the rear electrode layer and the light absorption layer, wherein the rear electrode layer and the light absorption layer are arranged so as to be stepped.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: September 4, 2018
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Jin Ho Gwon
  • Publication number: 20170366281
    Abstract: An antenna system using a motion sensor includes an antenna having a plurality of axes within a smart device, whereby motion sensor sensing axis information is generated by movement or rotation of the plurality of axes of the antenna, and a controller for controlling the information sensed by the motion sensor and a strength of a signal of the antenna having the plurality of axes received in real time.
    Type: Application
    Filed: November 23, 2016
    Publication date: December 21, 2017
    Inventors: Seul Ki JEON, Hyun Sang KIM, Nam Woong HUR, Jin Ho GWON
  • Publication number: 20170188953
    Abstract: An apparatus for measuring a bio-signal includes: a light source emitting a predetermined amount of light into a human body; a light receiving unit receiving at least some of the predetermined amount of light; and a cover, which is touchable by the human body, protecting the light source and the light receiving unit. The light source and the cover are arranged such that the light source and the cover are separated by a first gap, the light receiving unit and the cover are arranged such that the light receiving unit and the cover are separated by a second gap, and the first gap is less than the second gap.
    Type: Application
    Filed: August 29, 2016
    Publication date: July 6, 2017
    Inventors: Seul Ki Jeon, Nam Woong Hur, Eung Hwan Kim, Jin Ho Gwon, Sang Hun Lee
  • Publication number: 20160268454
    Abstract: The present invention comprises: a supporting substrate; a rear electrode layer disposed on the supporting substrate; a light absorption layer disposed on the rear electrode layer; a front electrode layer disposed on the light absorption layer; and a first penetrating groove penetrating the rear electrode layer and the light absorption layer, wherein the rear electrode layer and the light absorption layer are arranged so as to be stepped.
    Type: Application
    Filed: September 17, 2014
    Publication date: September 15, 2016
    Inventor: Jin Ho GWON
  • Patent number: 9070691
    Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A to semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: June 30, 2015
    Assignee: SK HYNIX INC.
    Inventors: Jae Sung Oh, Moon Un Hyun, Jong Hyun Kim, Jin Ho Gwon
  • Publication number: 20150136218
    Abstract: A solar cell and a method of fabricating the same are provided. The solar cell includes a substrate, a back electrode layer on the substrate, a light absorbing layer on the back electrode layer, and a buffer layer on the light absorbing layer. The back electrode layer, the light absorbing layer, and the buffer layer are formed therein with a first through hole formed through the back electrode layer, the light absorbing layer, and the buffer layer, and an insulating member is deposited in the first through hole.
    Type: Application
    Filed: June 26, 2013
    Publication date: May 21, 2015
    Applicant: LG INNOTEK CO., LTD.
    Inventor: Jin Ho Gwon
  • Publication number: 20150129028
    Abstract: A solar cell includes a substrate; a back electrode layer on the substrate; a light absorbing layer on the back electrode layer; and a buffer layer on the light absorbing layer. A first through hole is formed through the back electrode layer, a second through hole is formed through the buffer layer and the light absorbing layer, and the first through hole is overlapped with the second through hole.
    Type: Application
    Filed: July 26, 2013
    Publication date: May 14, 2015
    Applicant: LG INNOTEK CO., LTD.
    Inventor: Jin Ho Gwon
  • Publication number: 20140332946
    Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A to semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.
    Type: Application
    Filed: July 25, 2014
    Publication date: November 13, 2014
    Inventors: Jae Sung OH, Moon Un HYUN, Jong Hyun KIM, Jin Ho GWON
  • Patent number: 8823158
    Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 2, 2014
    Assignee: SK Hynix Inc.
    Inventors: Jae Sung Oh, Moon Un Hyun, Jong Hyun Kim, Jin Ho Gwon, Dong You Kim, Ki Bon Cha
  • Patent number: 8299591
    Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: October 30, 2012
    Assignees: Hynix Semiconductor Inc.
    Inventors: Jae Sung Oh, Moon Un Hyun, Jong Hyun Kim, Jin Ho Gwon, Dong You Kim, Ki Bon Cha
  • Patent number: 8024857
    Abstract: A substrate for a semiconductor package having a reinforcing member that prevents or minimizes distortions is presented. The substrate for the semiconductor package includes a substrate body, an insulation layer, and a reinforcing member. The substrate body has a first region having a plurality of chip mount regions, a second region disposed along a periphery of the first region, a circuit pattern disposed in each chip mount region and a dummy pattern disposed along the second region. The insulation layer covers the first and second regions and has an opening exposing some portion of each circuit pattern. The reinforcing member is disposed in the second region and prevents deflection of the substrate body.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: September 27, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Young Hy Jung, Jae Sung Oh, Ki Il Moon, Ki Chae Kim, Chan Sun Lee, Jin Ho Gwon, Jae Youn Choi
  • Publication number: 20100117200
    Abstract: A substrate for a semiconductor package having a reinforcing member that prevents or minimizes distortions is presented. The substrate for the semiconductor package includes a substrate body, an insulation layer, and a reinforcing member. The substrate body has a first region having a plurality of chip mount regions, a second region disposed along a periphery of the first region, a circuit pattern disposed in each chip mount region and a dummy pattern disposed along the second region. The insulation layer covers the first and second regions and has an opening exposing some portion of each circuit pattern. The reinforcing member is disposed in the second region and prevents deflection of the substrate body.
    Type: Application
    Filed: December 31, 2008
    Publication date: May 13, 2010
    Inventors: Young Hy JUNG, Jae Sung OH, Ki Il MOON, Ki Chae KIM, Chan Sun LEE, Jin Ho GWON, Jae Youn CHOI
  • Publication number: 20100072598
    Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.
    Type: Application
    Filed: December 31, 2008
    Publication date: March 25, 2010
    Inventors: Jae Sung OH, Moon Un HYUN, Jong Hyun KIM, Jin Ho Gwon, Dong You KIM, Ki Bon CHA