Patents by Inventor Jin Hong Lee

Jin Hong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060120428
    Abstract: The distributed feedback semiconductor laser includes: a lower clad layer formed on a substrate; a ridge including an active layer and an upper clad layer sequentially formed on the lower clad layer; and a grating formed at a sidewall or both sidewalls of the ridge including the active layer in a direction perpendicular to the active layer and a resonance axis so as to enable a single longitudinal mode oscillation. The grating has parallel grooves that are equally spaced at a period equal to an integer multiple of half of an oscillation wavelength ? (n?/2, n=1, 2, 3 . . . ).
    Type: Application
    Filed: November 14, 2005
    Publication date: June 8, 2006
    Inventors: Dae Kon Oh, Jin Hong Lee, Jin Soo Kim, Sung Ui Hong, Ho Sang Kwack
  • Publication number: 20040216660
    Abstract: Provided is a method of forming quantum dots in which the quantum dots are formed on a thin InxGa1-xAs strained layer. The In(Ga)As quantum dots can be applied to an active layer of an optical device such as a laser diode or an optical detector.
    Type: Application
    Filed: December 12, 2003
    Publication date: November 4, 2004
    Inventors: Jin Soo Kim, Won Seok Han, Jin Hong Lee, Sung Ui Hong, Ho Sang Kwack, Dae Kon Oh
  • Publication number: 20020001935
    Abstract: A method of forming a gate electrode in semiconductor device which can prevent transformation of the gate electrode, is disclosed. According to the present invention, a gate insulating layer, a doped polysilicon layer and a sacrificial layer are formed on a semiconductor substrate, sequentially. The sacrificial layer and the polysilicon layer are then etched in the shape of a gate electrode to form a sacrificial pattern and a polysilicon pattern. Next, the substrate is re-oxidized to form a re-oxidation layer on the side walls of the polysilicon pattern and LDD ions are implanted into the substrate of both sides of the re-oxidation layer. A spacer of an insulating layer is then formed on the side walls of the sacrificial pattern and the re-oxidation layer and impurity ions of a high concentration are implanted into the substrate of both sides of the spacer. Thereafter, an intermediate insulating layer is formed on the overall substrate and etched to expose the surface of the sacrificial pattern.
    Type: Application
    Filed: November 5, 1999
    Publication date: January 3, 2002
    Inventors: HYEON SOO KIM, JIN HONG LEE, IN SEOK YEO
  • Patent number: 6277722
    Abstract: A method for forming a poly metal gate, comprising the steps of: providing a substrate where a gate oxide is formed; forming a polysilicon film, a barrier metal, a refractory metal film and a hard mask over the gate oxide; patterning the hard mask, the refractory metal film, the barrier metal and the polysilicon film to form a gate metal gate; forming a capping layer for oxidation prevention over the gate oxide to cover the poly metal gate; etching the capping layer for oxidation prevention to remain in sidewalls of the poly metal gate; carrying out a heat treatment using a H2 gas to cover a damage of the capping layer for oxidation prevention in the capping layer etching step; and carrying out a reoxidation process to recover a damage caused in the etching step for the formation of the poly metal gate and improve reliability of the gate oxide.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: August 21, 2001
    Assignee: Hyundai Electronics
    Inventors: Sang Moo Lee, Jin Hong Lee
  • Patent number: 6194294
    Abstract: A method of forming a gate electrode in a semiconductor device which can easily perform gate re-oxidation process without transforming the morphology of the gate electrode, is disclosed. According to the present invention, a gate oxide layer, a doped polysilicon layer, a barrier metal layer and a refractory metal layer are formed on a semiconductor substrate, in sequence. A hard mask is then formed on the refractory metal. Next, the refractory metal layer, the barrier metal layer and the polysilicon layer are etched using the hard mask as an etch mask to form a gate electrode. A spacer for oxidation barrier is then formed on the side wall of the gate electrode and the hard mask. Thereafter, gate re-oxidation process is performed using the spacer as an oxidation mask to form a re-oxidation layer on the substrate of both sides of the spacer. The spacer is formed of a nitride layer such as a SiON layer or a Si4N3 layer. Furthermore, the spacer is formed to the thickness of 50 to 300 Å.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: February 27, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jin Hong Lee
  • Patent number: 5883911
    Abstract: An improved surface-emitting laser device by which the light emitting wave length can be easily varied since the electric potential grown using the thin film material having a desired lattice rate uses a very small portion of activation layers, and by which the continuous oscillation is made at room temperature by using the reflector having high reflective index. Thus, optical characteristics are increased, which includes a GaAs substrate; a lower reflector is formed of multiple layers of AlAs/GaAs heterogenous thin films having a reflective index of 1 on the GaAs substrate; a tooth-shaped grading layer is formed of a lower reflector on the lower reflector and an In.sub.x Ga.sub.1-x As thin film having a large lattice rate in a compositional grading method; a tooth-shaped InGaAs grading well is formed on the In.sub.x Ga.sub.1-x As grading layer as an In composition of which reduced rather than the grading layer; a buffer layer is formed on the In.sub.x Ga.sub.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: March 16, 1999
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bun Lee, Jong-Hyeob Baek, Sung-Woo Choi, Jin-Hong Lee
  • Patent number: 5748319
    Abstract: A method for sensing the completion of removal of an oxide layer from a semiconductor substrate or a super conductor by a thermal etching in real time. In the method, the time of removal of the oxide layer on the semiconductor substrate or the super conductor can ben accurately sensed. According to the method, when an oxide layer which is different from the semiconductor substrate in the refractive index is being thermally etched at a high temperature, the reflected signals of the laser beams forms a periodicity, and this periodicity is utilized so as to determine the etching rate and the time of the completion of the etching.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: May 5, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong-Hyeob Baek, Bun Lee, Sung-Woo Choi, Jin-Hong Lee
  • Patent number: 5705403
    Abstract: A method of sensing the concentration of a doped impurity on a semiconductor in real time and a method of sensing the change of its growth rate dependent on time among the changes of the growing conditions due to doping by using a real time analysis apparatus in growing a heterostructured semiconductor by a MOCVD method. A reflecting signal during the growth by means of a real time analysis apparatus has a periodic property, an amplitude change of a reflecting signal is dependent on an absorption coefficient when an absorption exists on an epitaxial layer, an impurity concentration can be obtained by using the relation of an absorption coefficient and an impurity concentration. In addition, if each peak is independently analyzed, the respective growth rate dependent on time are measured individually, so that the reduced growth rate dependent on time of the growth rate is sensed in a carbon doped AlAs layer.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: January 6, 1998
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong-Hyeob Baek, Bun Lee, Jin-Hong Lee, Sung-Woo Choi