Abstract: The present invention relates to a glass substrate composition comprising SiO2 55˜70 wt %, Al2O3 0˜1 wt %, ZrO2 0.1˜5 wt %, Na2O 0.1˜5 wt %, K2O 7˜13 wt %, MgO 7˜14 wt %, CaO 0˜4 wt %, SrO 7˜12 wt % and SO3 0.01˜0.5 wt %. The glass substrate prepared by using the above composition shows less thermal deformation at a baking process under a high temperature since the strain point of the glass is at least 570° C., does not have such disadvantages as increase of fuel cost and short life cycle of refractories resulted from less than 1460° C. of melting point, and has 80˜95×l0?7/° C. of thermal expansion coefficient in the temperature range of 50˜350° C. Therefore, the glass according to the present invention is suitable as a substrate.

Abstract: A semiconductor chip package includes an IC chip and a tape circuit substrate. The tape circuit substrate has a base film and a plurality of beam leads formed on the base film. One end portion of each beam lead extends from the base film, and the extended portion has a widthwise wavy portion. The widthwise wavy portion may be, for example, semicircular shaped, S-shaped or zig-zag shaped. The IC chip has chip pads formed on a top surface thereof.

Abstract: A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an embossed portion, i.e., having a non-planar surface. A metal wiring layer is formed on the resulting structure including the embossed portion. A third dielectric layer is formed on the metal wiring layer. A portion of the third dielectric layer located on the embossed portion is removed to form a ball pad. A solder ball is formed on the embossed ball pad. With the embossed ball pad, the contact area between the solder balls and the metal wiring layer is increased, thereby improving the connection reliability.

Abstract: A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an embossed portion, i.e., having a non-planar surface. A metal wiring layer is formed on the resulting structure including the embossed portion. A third dielectric layer is formed on the metal wiring layer. A portion of the third dielectric layer located on the embossed portion is removed to form a ball pad. A solder ball is formed on the embossed ball pad. With the embossed ball pad, the contact area between the solder balls and the metal wiring layer is increased, thereby improving the connection reliability.

Abstract: A power divider having metal capacitors is disclosed to detect and divide a frequency signal. The divide includes a first capacitor including first and second electrodes formed at a first portion of a substrate, a second capacitor including first and second electrodes formed at a second portion of the substrate, a first metal line connected to the second electrode of the first capacitor, a second metal line connected to the second electrode of the second capacitor, a poly resistor connected to a contact area of the first capacitor and to a contact area of the second capacitor, and a third metal line connected to the first and second metal lines to divide a signal flown through the first and second metal lines.

Abstract: According to various embodiments of the present invention, a bonding pad structure of a semiconductor device reduces damage caused by thermo-mechanical stress in beam lead bonding. A method of fabricating an improved bonding pad structure is also provided. A polysilicon film plate is preferably formed between a bonding pad metal layer and a dielectric layer. The polysilicon film plate absorbs external thermo-mechanical stress and improves the durability of the bonding pad in a bond pull test (BPT). The bonding between the bonding pad metal layer and the dielectric layer is also improved. Other features and advantages are also provided.

Abstract: A semiconductor chip package includes an IC chip and a tape circuit substrate. The tape circuit substrate has a base film and a plurality of beam leads formed on the base film. One end portion of each beam lead extends from the base film, and the extended portion has a wavy portion. The wavy portion can be, for example, semicircular shaped, an S-shaped, or a zigzag shaped. The IC chip has chip pads formed on a top surface thereof. The beam lead is bonded to the chip pad through an inner lead bonding (ILB) process. During the ILB process, the wavy portion disperses the stress produced in the beam lead. Therefore, a crack or a break of the beam lead due to the stress can be effectively prevented, improving interconnection reliability between the IC chip and the tape circuit substrate.

Abstract: Devices that have bonding pads, and methods for fabricating the same. The bonding pads have two conductive layers, and an intermediate layer between them. The intermediate layer has a hybrid configuration of a relatively large conductive plate section, and a mixed plugs/mesh section. The plugs/mesh section has conductive portions interspersed with non-conducting portions, with features that are relatively small in size. The hybrid configuration achieves a proper balance between the plate section for the main electrical contact, and the plugs/mesh section for support and additional current density.

Abstract: A semiconductor wafer with semiconductor chips having chip pads and a passivation layer is provided. First and second dielectric layers are sequentially formed on the passivation layer. The first and second dielectric layers form a ball pad area that includes an embossed portion, i.e., having a non-planar surface. A metal wiring layer is formed on the resulting structure including the embossed portion. A third dielectric layer is formed on the metal wiring layer. A portion of the third dielectric layer located on the embossed portion is removed to form a ball pad. A solder ball is formed on the embossed ball pad. With the embossed ball pad, the contact area between the solder balls and the metal wiring layer is increased, thereby improving the connection reliability.

Abstract: A method for controlling a bus in a digital interface is disclosed. In the present method, after a self identifying process when a bus reset occurs, a determination is made whether a node which needs to transmit isochronous data is a new node which needs to newly transmit isochronous data or a previously connected node which had been transmitting isochronous data before the bus reset. Thereafter, priority is given to previously connected nodes in allocating channels and bandwidth to previously connected node(s).

Abstract: A semiconductor device for reinforcing a substructure of a bond pad and a method for fabricating the same are provided. According to an embodiment, a semiconductor device for reinforcing a substructure of a bond pad comprises a semiconductor substrate and a substructure formed on the semiconductor substrate. The semiconductor device further includes an interlevel dielectric layer formed on the substructure. The interlevel dielectric layer includes a contact opening formed therein. The contact opening comprises a plurality of separate dots connected to each other. A contact plug is formed in the contact opening.

Abstract: A semiconductor device package includes an integrated circuit chip having a plurality of chip pads thereon, and a plurality of ball pads rerouted from the chip pads, and a substrate including a plurality of substrate pads thereon. Solder joints, each physically and electrically connecting a ball pad and a substrate pad, are between the to package and the substrate. A stress-relieving film, which can be a polyimide or other dielectric film, lies away front amend between the package and the substrate. A plurality of via holes or metal regions are in the film at positions corresponding to the solder joints. The solder balls are formed on the package and the substrate or only on the package. The solder joints are through the via holes or attached to the metal regions. The stress-relieving film thus attaches to the solder joints and distributes stress in the solder joints over the stress-relieving film to reduce the probability of cracking the solder joints.

Abstract: A method and a system for arbitrating accesses to a memory in a data processing system having many memory access units (MAU) and an arbiter are disclosed. The arbiter initially sends a permission signal to each MAU to give each MAU a chance to reset its priority level if necessary. Then each of a first set of top priority MAUs that was not able to access to the memory for a predetermined period of time resets its priority level to a top priority value and sends a second priority value to the arbiter. Thereafter the arbiter selects a MAU among the first set of top priority MAUs and sends an acknowledgement signal to the selected MAU. If none of the first set of top priority MAUs exist, the arbiter identifies a second set of top priority MAUs by checking the predetermined starvation period of each MAU and sends an acknowledgement signal to one of the second set of top priority MAUs.

Abstract: A semiconductor device package includes an integrated circuit chip having a plurality of chip pads thereon, and a plurality of ball pads rerouted from the chip pads, and a substrate including a plurality of substrate pads thereon. Solder joints, each physically and electrically connecting a ball pad and a substrate pad, are between the package and the substrate. A stress-relieving film, which can be a ployimide or other dielectric film, lies away from and between the package and the substrate. A plurality of via holes or metal regions are in the film at positions corresponding to the solder joints. The solder balls are formed on the package and the substrate or only on the package. The solder joints are through the via holes or attached to the metal regions. The stress-relieving film thus attaches to the solder joints and distributes stress in the solder joints over the stress-relieving film to reduce the probability of cracking the solder joints.

Abstract: A semiconductor device for reinforcing a substructure of a bond pad and a method for fabricating the same are provided. According to an embodiment, a semiconductor device for reinforcing a substructure of a bond pad comprises a semiconductor substrate and a substructure formed on the semiconductor substrate. The semiconductor device further includes an interlevel dielectric layer formed on the substructure. The interlevel dielectric layer includes a contact opening formed therein. The contact opening comprises a plurality of separate dots connected to each other. A contact plug is formed in the contact opening.

Abstract: A power divider having metal capacitors is disclosed to detect and divide a frequency signal. The divide includes a first capacitor including first and second electrodes formed at a first portion of a substrate, a second capacitor including first and second electrodes formed at a second portion of the substrate, a first metal line connected to the second electrode of the first capacitor, a second metal line connected to the second electrode of the second capacitor, a poly resistor connected to a contact area of the first capacitor and to a contact area of the second capacitor, and a third metal line connected to the first and second metal lines to divide a signal flown through the first and second metal lines.

Abstract: Devices that have bonding pads, and methods for fabricating the same. The bonding pads have two conductive layers, and an intermediate layer between them. The intermediate layer has a hybrid configuration of a relatively large conductive plate section, and a mixed plugs/mesh section. The plugs/mesh section has conductive portions interspersed with non-conducting portions, with features that are relatively small in size. The hybrid configuration achieves a proper balance between the plate section for the main electrical contact, and the plugs/mesh section for support and additional current density.

Abstract: According to various embodiments of the present invention, a bonding pad structure of a semiconductor device reduces damage caused by thermo-mechanical stress in beam lead bonding. A method of fabricating an improved bonding pad structure is also provided. A polysilicon film plate is preferably formed between a bonding pad metal layer and a dielectric layer. The polysilicon film plate absorbs external thermo-mechanical stress and improves the durability of the bonding pad in a bond pull test (BPT). The bonding between the bonding pad metal layer and the dielectric layer is also improved. Other features and advantages are also provided.

Abstract: A method and a system for arbitrating accesses to a memory in a data processing system having many memory access units (MAU) and an arbiter are disclosed. The arbiter initially sends a permission signal to each MAU to give each MAU a chance to reset its priority level if necessary. Then each of a first set of top priority MAUs that was not able to access to the memory for a predetermined period of time resets its priority level to a top priority value and sends a second priority value to the arbiter. Thereafter the arbiter selects a MAU among the first set of top priority MAUs and sends an acknowledgement signal to the selected MAU. If none of the first set of top priority MAUs exist, the arbiter identifies a second set of top priority MAUs by checking the predetermined starvation period of each MAU and sends an acknowledgement signal to one of the second set of top priority MAUs.

Abstract: A semiconductor chip package includes a semiconductor chip, a lead frame including a plurality of inner leads each having a wire bonding point on a top surface, bonding wires for electrically interconnecting the semiconductor chip to each of the plurality of inner leads, and a molding compound for encapsulating the semiconductor chip and the inner leads. Each of the plurality of inner leads of the lead frame has a means for locking movement of the molding compound against the top surfaces of the inner leads, and the locking means, for example a linear groove, down set feature of the inner lead or second wire ball, is placed in close proximity to the wire bonding.