Patents by Inventor Jin-Jun Park

Jin-Jun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240123548
    Abstract: Embodiments relate to laser welding methods, monitoring methods, and monitoring systems for a secondary battery. A laser welding method for a secondary battery includes performing laser welding on a positive electrode base having a thin-film shape in which a plurality of positive electrode base tabs are formed at a side, a negative electrode base having a thin-film shape in which a plurality of negative electrode base tabs are formed at a side, and a thin-film multi-tab to be joined to each of the positive electrode base and the negative electrode base, a welded portion in which the multi-tab is welded with the positive electrode base and the negative electrode base being melting-joined by using a laser such that a plurality of welding spots is formed on the welded portion.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Inventors: Jae Hoon ROH, Sang Hyun RYU, Myung Jun PARK, Seong Bae AN, Yong Gyu AN, Hee Dong JUNG, Jin Gyu HEO
  • Patent number: 11952442
    Abstract: The present disclosure provides a method for preparing a vinyl chloride-based polymer, the method including a step of injecting an ionizable normal salt and polymerizing a vinyl chloride monomer in the presence of one or more emulsifiers and a polymerization initiator, wherein the ionizable normal salt includes a carbonate metal salt or a sulfite metal salt, and the ionizable normal salt is continuously injected in an amount of 70 to 1200 ppm based on the total weight of the vinyl chloride monomer when a polymerization conversion rate is in a range of 0% to 20%. The method capable of preparing a vinyl chloride-based polymer suitable as an eco-friendly material, while not affecting the rate of polymerization reaction and decreasing the generation amount of total volatile organic compounds by controlling the injection time, injection amount and kind of the ionizable normal salt, is provided.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: April 9, 2024
    Assignee: LG CHEM, LTD.
    Inventors: Jin Hyuck Ju, Hyun Min Lee, Hyun Kyou Ha, Kun Ji Kim, Kwang Jin Lee, Yang Jun Jeon, Jae Hyun Park
  • Publication number: 20240106027
    Abstract: Disclosed is a case for a battery module including a body having an internal space; and an end plate disposed on an end of the body, wherein the body includes a bottom plate on which a coolant flow path through which a coolant flows is formed, and wherein the end plate includes a coolant flow tube through which the coolant flows and a connection portion extending from the coolant flow tube and coupled to the coolant flow path.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 28, 2024
    Inventors: Suk Ho SHIN, Min Song KANG, Ji Woong KIM, Byeong Jun PAK, Ju Yong PARK, Jin Su HAN
  • Publication number: 20240107032
    Abstract: The present invention relates to an image encoding and decoding technique, and more particularly, to an image encoder and decoder using unidirectional prediction. The image encoder includes a dividing unit to divide a macro block into a plurality of sub-blocks, a unidirectional application determining unit to determine whether an identical prediction mode is applied to each of the plurality of sub-blocks, and a prediction mode determining unit to determine a prediction mode with respect to each of the plurality of sub-blocks based on a determined result of the unidirectional application determining unit.
    Type: Application
    Filed: December 7, 2023
    Publication date: March 28, 2024
    Applicants: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation, University-Industry Cooperation Group of Kyung Hee University
    Inventors: Hae Chul CHOI, Se Yoon JEONG, Sung-Chang LIM, Jin Soo CHOI, Jin Woo HONG, Dong Gyu SIM, Seoung-Jun OH, Chang-Beom AHN, Gwang Hoon PARK, Seung Ryong KOOK, Sea-Nae PARK, Kwang-Su JEONG
  • Patent number: 11932618
    Abstract: Disclosed are novel compounds of Chemical Formula 1, optical isomers of the compounds, and pharmaceutically acceptable salts of the compounds or the optical isomers. The compounds, isomers, and salts exhibit excellent activity as GLP-1 receptor agonists. In particular, they, as GLP-1 receptor agonists, exhibit excellent glucose tolerance, thus having a great potential to be used as therapeutic agents for metabolic diseases. Moreover, they exhibit excellent pharmacological safety for cardiovascular systems.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: March 19, 2024
    Assignee: ILDONG PHARMACEUTICAL CO., LTD.
    Inventors: Hong Chul Yoon, Kyung Mi An, Myong Jae Lee, Jin Hee Lee, Jeong-geun Kim, A-rang Im, Woo Jin Jeon, Jin Ah Jeong, Jaeho Heo, Changhee Hong, Kyeojin Kim, Jung-Eun Park, Te-ik Sohn, Changmok Oh, Da Hae Hong, Sung Wook Kwon, Jung Ho Kim, Jae Eui Shin, Yeongran Yoo, Min Whan Chang, Eun Hye Jang, In-gyu Je, Ji Hye Choi, Gunhee Kim, Yearin Jun
  • Patent number: 11930179
    Abstract: An image encoding/decoding method is provided. An image decoding method of the present invention may comprise deriving an intra-prediction mode of a current luma block, deriving an intra-prediction mode of a current chroma block based on the intra-prediction mode of the current luma block, generating a prediction block of the current chroma block based on the intra-prediction mode of the current chroma block, and the deriving of an intra-prediction mode of a current chroma block may comprise determining whether or not CCLM (Cross-Component Linear Mode) can be performed for the current chroma block.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: March 12, 2024
    Assignees: Electronics and Telecommunications Research Institute, INDUSTRY ACADEMY COOPERATION FOUNDATION OF SEJONG UNI, CHIPS & MEDIA, INC, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY
    Inventors: Sung Chang Lim, Jung Won Kang, Ha Hyun Lee, Jin Ho Lee, Hui Yong Kim, Yung Lyul Lee, Ji Yeon Jung, Nam Uk Kim, Myung Jun Kim, Yang Woo Kim, Dae Yeon Kim, Jae Gon Kim, Do Hyeon Park
  • Patent number: 11929381
    Abstract: An image sensor including: a substrate which includes a first surface and a second surface opposite each other; a plurality of pixels, each pixel including a photoelectric conversion layer in the substrate; a pixel separation pattern disposed in the substrate and separating the pixels; a surface insulating layer disposed on the first surface of the substrate; conductor contacts disposed in the surface insulating layer; and a grid pattern disposed on the surface insulating layer, wherein the pixel separation pattern includes a first portion and a second portion arranged in a direction parallel to the first surface of the substrate, and the conductor contacts are interposed between the first portion of the pixel separation pattern and the grid pattern and are not interposed between the second portion of the pixel separation pattern and the grid pattern.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 12, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Han Seok Kim, Byung Jun Park, Jin Ju Jeon, Hee Geun Jeong
  • Publication number: 20240080228
    Abstract: A data receiving device may include a dummy stage block. The dummy stage block may include m dummy stages, wherein m is a natural number greater than or equal to two. Each of the m dummy stages may be configured to remove inter-symbol interference (ISI) from a dummy input signal using dummy coefficient information to generate a dummy output signal free of the ISI. Each of the m dummy stages may be further configured to output the dummy output signal. A normal stage block may include n normal stages, wherein n is a natural number greater than or equal to two. Each of the n normal stages may be configured to remove ISI from an input signal using coefficient information to generate an output signal free of the ISI and may be further configured to output the output signal.
    Type: Application
    Filed: April 13, 2023
    Publication date: March 7, 2024
    Inventors: Jin Ook JUNG, Jae Woo PARK, Myoung Bo KWAK, Young Min KU, Kyoung Jun ROH, Jung Hwan CHOI
  • Publication number: 20240071786
    Abstract: The present disclosure provides substrate heat-treating apparatus including a process chamber in which a flat substrate to be heat treated is placed, the process chamber comprising a beam irradiating plate placed below the flat substrate and an infrared transmitting plate placed above the flat substrate; a beam irradiating module for irradiating a laser beam to a lower surface of the flat substrate through the beam irradiating plate; and a gas circulation cooling module for spraying a cooling gas to an upper surface of the infrared transmitting plate, thereby cooling the infrared transmitting plate.
    Type: Application
    Filed: December 23, 2021
    Publication date: February 29, 2024
    Inventors: Hyoung June Kim, Byung Kuk Kim, Wang Jun Park, Oh Sung Kwon, Jin Hong Lee, Nam Chun Lee
  • Publication number: 20240072228
    Abstract: A display device comprises a first pixel including a first emission area, a second pixel including a second emission area spaced apart from the first emission area in a first direction, and a bank partitioning the first emission area and the second emission area, wherein the first pixel includes a first alignment electrode, a second alignment electrode, and a third alignment electrode sequentially located, spaced apart from each other in the first direction, and overlapping with the first emission area, first light-emitting elements above, and overlapping with, the first alignment electrode and the second alignment electrode, second light-emitting elements above, and overlapping with, the second alignment electrode and the third alignment electrode, and a dummy electrode between the first emission area and the second emission area, and overlapping with the bank.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 29, 2024
    Inventors: Won Jun LEE, Dong Woo KIM, Do Yeong PARK, Se Hyun LEE, Kwi Hyun KIM, Min Gyeong SHIN, Jin Joo HA
  • Publication number: 20240071896
    Abstract: A semiconductor package includes a redistribution substrate having a first side and an opposite second side. A plurality of redistribution patterns are in the redistribution substrate, and a semiconductor chip is on the first side of the redistribution substrate. A plurality of metal pillars are positioned around and spaced apart from a periphery of the semiconductor chip and are connected to the redistribution patterns. A plurality of solder balls are on the second side of the redistribution substrate. Each of the metal pillars includes a third side facing the first side of the redistribution substrate, and an opposite fourth side. The fourth side has a square or octagonal shape in plan view.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 29, 2024
    Inventors: Jin Won CHAE, Moon Gil JUNG, Kwang-Bae KIM, So Yoen PARK, Hyung Jun CHOI
  • Publication number: 20240073416
    Abstract: The present invention relates to an apparatus and method for encoding and decoding an image by skip encoding. The image-encoding method by skip encoding, which performs intra-prediction, comprises: performing a filtering operation on the signal which is reconstructed prior to an encoding object signal in an encoding object image; using the filtered reconstructed signal to generate a prediction signal for the encoding object signal; setting the generated prediction signal as a reconstruction signal for the encoding object signal; and not encoding the residual signal which can be generated on the basis of the difference between the encoding object signal and the prediction signal, thereby performing skip encoding on the encoding object signal.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicants: Electronics and Telecommunications Research Institute, Kwangwoon University Industry-Academic Collaboration Foundation, Universily-lndustry Cooperation Group of Kyung Hee University
    Inventors: Sung Chang LIM, Ha Hyun LEE, Se Yoon JEONG, Hui Yong KIM, Suk Hee CHO, Jong Ho KIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Dong Gyu SIM, Seoung Jun OH, Gwang Hoon PARK, Sea Nae PARK, Chan Woong JEON
  • Publication number: 20240071788
    Abstract: The present disclosure discloses a flat substrate heating apparatus including a module support plate having a plurality of unit module regions placed on an upper surface thereof; a plurality of laser light source modules having a plurality of laser light source devices and seated on unit module regions of the module support plate, respectively; a power supply board placed below the module support plate and configured to supply power to the laser light source module; and an electrode terminal electrically connecting the laser light source module and the power supply board while detachably securing them to upper and lower surfaces of the module support plate.
    Type: Application
    Filed: December 30, 2021
    Publication date: February 29, 2024
    Inventors: Hyoung June Kim, Byung Kuk Kim, Wang Jun Park, Jin Hong Lee, Nam Chun Lee
  • Patent number: 11915859
    Abstract: Disclosed is a core for a current transformer, which forms an upper core in a round shape, and is disposed at a position lower than the center of a power line having both ends of the upper core received, thereby minimizing the stress of a magnetic path, and increases the permeability, thereby enhancing the magnetic induction efficiency. The disclosed core for the current transformer includes an upper core curved in a semi-circular shape to have a receiving groove formed therein, and having both ends extended downwards to be disposed to be spaced apart from each other and a lower core disposed on the lower portion of the upper core, and having both ends extended upwards to be disposed to face both ends of the upper core.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: February 27, 2024
    Assignee: AMOSENSE CO., LTD
    Inventors: Cheol-Seung Han, Won-San Na, Jin-Pyo Park, Young-Joon Kim, Jae-Jun Ko
  • Patent number: 8188554
    Abstract: A memory device includes a bit line, a first word line, a bit line contact, an electrode, a second word line and a contact tip. The bit line may extend along a first direction. The first word line is formed over the bit line and extends in a second direction. The bit line contact is formed between adjacent first word lines. The bit line contact may have an upper face substantially higher than the first word lines. The electrode contacting with the bit line contact may include an elastic material bending by an electric field among the electrode, the first word line and the second word line. The second word line is disposed over the electrode and corresponds to at least one of the first word lines. The contact tip formed at a lateral portion of the electrode may protrude toward the first and the second word lines.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: May 29, 2012
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventor: Jin-Jun Park
  • Patent number: 8059421
    Abstract: Example embodiments relate to a memory card including a generally box-shaped printed circuit board, a control chip in the generally box-shaped printed circuit board, a memory chip in the generally box-shaped printed circuit board, and a plurality of contact pads on at least two portions of an upper portion, a lower portion, a left portion and a right portion of a front face of the generally box-shaped printed circuit board, and on at least two portions of an upper portion, a lower portion, a left portion and a right portion of a rear face of the generally box-shaped printed circuit board.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: November 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-Jun Park
  • Patent number: 7897424
    Abstract: A memory device includes a bit line, a reading word line, a bit line contact, an electrode, a writing word line and a contact tip. The bit line is formed on a substrate. The reading word line is formed over the bit line. The bit line contact is disposed between adjacent reading word lines. The electrode extends substantially in parallel to the reading word line and includes a conductive material being bent in response to an applied voltage. The writing word line is formed over the electrode and is separated from the electrode. The contact tip is formed at an end portion of the electrode and is separated from the reading and the writing word lines. The contact tip protrudes toward the reading word line or writing word line.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: March 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-Jun Park
  • Patent number: 7894062
    Abstract: An overlay measuring apparatus includes a light source which generates visible light with a plurality of wavelengths, an optical module which selects visible light with a single wavelength from the visible light generated by the light source, makes the visible light with a single wavelength incident on a plurality of overlay patterns, and uses visible light reflected from the plurality of overlay patterns to project the overlay patterns with a predetermined color, an imaging unit which acquires images of the plurality of overlay patterns according to individual wavelengths of the visible light and acquires corresponding image signals, and a control unit which outputs a control signal to the optical module so that the optical module can project the overlay pattern with a specific color using information associated with the individual wavelengths of the visible light that is used to project the overlay pattern image selected by a selection unit.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: February 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gyo-Hyung Choi, Jin-Jun Park
  • Patent number: 7872290
    Abstract: A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the substrate, the gate layer including a plurality of access gates formed over the active regions of the substrate and a plurality of pass gates formed over the field regions of the substrate, first self-aligned contact regions formed between adjacent pass gates and access gates, and second self-aligned contact regions formed between adjacent access gates, wherein a width of each of the first self-aligned contact regions is larger than a width of each of the second self-aligned contact regions.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: January 18, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Young Kim, Jin-Jun Park
  • Patent number: 7785964
    Abstract: Example embodiments relate to a non-volatile semiconductor memory device and a method of manufacturing the same. A semiconductor device includes an isolation layer protruding from a substrate, a spacer, a tunnel insulation layer, a floating gate, a dielectric layer pattern and a control gate. The spacer may be formed on a sidewall of a protruding portion of the isolation layer. The tunnel insulation layer may be formed on the substrate between adjacent isolation layers. The floating gate may be formed on the tunnel insulation layer. The floating gate contacts the spacer and has a width that gradually increases from a lower portion toward an upper portion. The dielectric layer pattern and the control gate may be sequentially formed on the floating gate.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: August 31, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Jun Park, Hee-Jin Kwak, Beom-Jun Jin