Abstract: Methods of programming a non-volatile memory device having at least one memory block with a plurality of memory cells located at intersections of rows and columns is disclosed. Pursuant to these methods, at least two addresses that select corresponding rows of the memory block may be received and temporarily stored. Then, the rows selected by the temporarily stored addresses may be simultaneously activated, and at least some of the memory cells in the activated rows are simultaneously programmed. Corresponding non-volatile memory devices are also provided.

Abstract: A tether for a passenger airbag cushion of a vehicle includes first and second twist preventing parts formed at both edges of the tether in the deployment direction of the tether by an inflator such that the thickness of both edges of the tether is increased. The airbag cushion is more reliably deployed because the tether is not twisted or folded due to the above structure when the tether is deployed.

Abstract: A passenger airbag module equipped with an airbag cushion and a tether holder used in a vehicle. The tether holder holds a tether prior to inflating the airbag cushion and inhibits twisting of the tether during deployment of the tether when the airbag cushion is inflated. When the tether is deployed without being twisted or folded, the deployment length of the tether is not reduced. Thus, the airbag is more consistently deployed and inflated.

Abstract: Embodiments of the present invention provide a flash memory device with a unified oscillation circuit, and a method of operating the device. The unified oscillation circuit produces alternative internal clock signals for corresponding alternative operating modes of the flash memory device. At least a portion of the unified oscillation circuit is used to generate all of the alternative internal clock signals. Compared to conventional memory devices and methods that use multiple oscillators, embodiments of the invention improve circuit density and reduce the incidence of timing glitches caused by switching between multiple oscillators.

Abstract: A compressor having a casing to which a gas suction pipe is connected; a driving motor provided in the casing; a cylinder; a valve supporting plate (210) covering the cylinder (300), the valve supporting plate (210) having a suction hole (212) for sucking gas into the cylinder (300) and two discharge holes (211) for discharging gas compressed in the cylinder (300); a piston (100) having two protrusions (101) at a pressure surface in correspondence to the two discharge holes (211) of the valve supporting plate (210), the protrusions (101) having different sized cross-sections, the piston being linearly reciprocal in the cylinder (300) by receiving a driving force of the driving motor; a suction valve coupled to the valve supporting plate (210) to open and close the suction hole (212); a discharge valve coupled to the valve supporting plate to open and close the two discharge holes (211).

Abstract: In one aspect, a word line enable method in a flash memory device includes driving a signal line corresponding to a selected word line with a word line voltage, and stepwise increasing a gate voltage of a switch transistor connected between the selected word line and the signal line during a program execute period.

Abstract: A detachable connecting rod includes a first member (410)a large end portion (411) having a trough hole (H1), and a first connection rod portion (412) extending from the large end portion (411), the first connection rod portion (412) having a pair of spaced apart arms defining a coupling groove (413) extending in the same direction as an axial direction of the through hole (H1); a second member (420) including a small end portion having a through hole (H2), and second connection rod portion (422) extending from the small end portion, the second connection rod (422) portion being inserted into the coupling groove (413) and a coupling unit for coupling the first connection rod portion (412) to the second connection rod portion inserted (412) into the coupling groove (413) of the first member (410). The detachable connecting rod is useable in a compressor.

Abstract: Embodiments of the invention provide a high voltage transfer circuit, a row decoder circuit comprising the high voltage transfer circuit, and a non-volatile semiconductor memory device comprising the high voltage transfer circuit. In one embodiment, the invention provides a high voltage transfer circuit of a semiconductor memory device comprising a high voltage switch comprising a high voltage transistor comprising a first terminal connected to a boosted voltage via a first depletion-type transistor and comprising a second terminal connected to an output node via a second depletion-type transistor. The high voltage transfer circuit further comprises a driver circuit adapted to drive the first and second depletion-type transistors and the high voltage transistor in response to an input signal.

Abstract: A voltage generator is provided. The voltage generator includes a voltage pump and a voltage controller. The voltage pump generates a target voltage using a clock signal. The voltage controller compares a temporary voltage input from the voltage pump with a reference voltage to generate a control signal controlling the voltage pump. The voltage controller includes a string of a plurality of resistors connected in series to change a level of the temporary voltage to a voltage level of a corresponding comparison voltage. When the plurality of resistors are in a string, a resistance of a resistor closest to one end of the string is greater than resistances of other resistors of the string. The voltage controller may further include a jumping unit controlling connection or disconnection of two arbitrary nodes among first to n-th nodes (where n is a natural number) defined as connection points of the adjacent resistors of the string.

Abstract: A method of programming a flash memory device includes charging selection lines with a first voltage while applying program data to bit lines to during a bit line setup interval, then activating a block word line to electrically connect the selection lines to corresponding word lines, and then applying a second voltage, greater than the first voltage, to a selected one of the selection lines. Related devices are also disclosed.

Abstract: A flash memory device includes a memory cell array, a bulk voltage generator and a controller. The memory cell array is formed in a bulk area and including memory cells arranged in rows and columns. The bulk voltage generator is configured to supply a bulk voltage to the bulk area. The controller is configured to control the bulk voltage generator to vary an erase time based on a time when the bulk voltage reaches a target voltage.

Abstract: Methods of programming a non-volatile memory device having at least one memory block with a plurality of memory cells located at intersections of rows and columns is disclosed. Pursuant to these methods, at least two addresses that select corresponding rows of the memory block may be received and temporarily stored. Then, the rows selected by the temporarily stored addresses may be simultaneously activated, and at least some of the memory cells in the activated rows are simultaneously programmed. Corresponding non-volatile memory devices are also provided.

Abstract: Embodiments of the present invention provide a flash memory device with a unified oscillation circuit, and a method of operating the device. The unified oscillation circuit produces alternative internal clock signals for corresponding alternative operating modes of the flash memory device. At least a portion of the unified oscillation circuit is used to generate all of the alternative internal clock signals. Compared to conventional memory devices and methods that use multiple oscillators, embodiments of the invention improve circuit density and reduce the incidence of timing glitches caused by switching between multiple oscillators.

Abstract: High voltage generator circuits and methods for operating non-volatile semiconductor memory devices are provided for use with non-volatile memory such as FLASH memory devices, to selectively generate different types of control voltages for various operating modes of non-volatile memory devices.

Abstract: Disclosed are a capacity variable type twin rotary compressor and a driving method thereof and an air conditioner using the same and a driving method thereof. A vane (124) can quickly and stably maintain contact with a rolling piston (124) even when the vane (124) starts or a compressor switches its driving such that noises resulted from the vane (124) when varying capacity are prevented to thereby greatly reduce noises of a compressor. By alternately driving compression units (110, 120) and allowing capacity to vary according to more than two steps, it is possible to meet various demands for assembly products such as the air conditioner and the enhancing energy efficiency by reducing unnecessary waste of power.

Abstract: Methods of programming a non-volatile memory device having at least one memory block with a plurality of memory cells located at intersections of rows and columns is disclosed. Pursuant to these methods, at least two addresses that select corresponding rows of the memory block may be received and temporarily stored. Then, the rows selected by the temporarily stored addresses may be simultaneously activated, and at least some of the memory cells in the activated rows are simultaneously programmed. Corresponding non-volatile memory devices are also provided.

Abstract: Embodiments of the invention provide a high voltage transfer circuit, a row decoder circuit comprising the high voltage transfer circuit, and a non-volatile semiconductor memory device comprising the high voltage transfer circuit. In one embodiment, the invention provides a high voltage transfer circuit of a semiconductor memory device comprising a high voltage switch comprising a high voltage transistor comprising a first terminal connected to a boosted voltage via a first depletion-type transistor and comprising a second terminal connected to an output node via a second depletion-type transistor. The high voltage transfer circuit further comprises a driver circuit adapted to drive the first and second depletion-type transistors and the high voltage transistor in response to an input signal.

Abstract: In one aspect, a word line enable method in a flash memory device includes driving a signal line corresponding to a selected word line with a word line voltage, and stepwise increasing a gate voltage of a switch transistor connected between the selected word line and the signal line during a program execute period.

Abstract: A method of programming a flash memory device includes charging selection lines with a first voltage while applying program data to bit lines to during a bit line setup interval, then activating a block word line to electrically connect the selection lines to corresponding word lines, and then applying a second voltage, greater than the first voltage, to a selected one of the selection lines.

Abstract: A fuse-free circuit may include a NAND flash memory cell, and a switch to turn on or off in response to data stored in the NAND flash memory cell. The fuse-free circuit may be embodied in a semiconductor device that also includes an adjustable circuit coupled to the switch. The adjustable circuit may be structured to emulate the No_Cut or Cut operation of a fuse in response to the on or off state of the switch.