Abstract: A test data generator, test system and method thereof are provided. In the example method, parallel test data may be received at a first data rate. The received parallel test data may be converted into serial test data at a second data rate. Noise (e.g., jitter noise, level noise, etc.) may be selectively inserted into the converted serial test data. The noise inserted into the serial test data, which may be configured to operate at a higher data rate than the parallel test data, may allow a device to be tested with higher data-rate test data. The example method may be performed by the example test data generator and/or by the example test system.

Abstract: A digital test apparatus for testing an analog semiconductor device includes a low pass filter which passes only a low frequency analog signal from among analog signals output from the analog semiconductor device, a rectifying unit connected to the low pass filter for converting the analog signal output from the low pass filter into a DC voltage, a high pass filter which passes only a high frequency analog signal from among analog signals output from the analog semiconductor device, a high frequency power detecting unit connected to the high pass filter for converting the analog signal output from the high pass filter into a DC voltage, and a digital measuring unit which is connected to the rectifying unit and the high frequency power detecting unit and measures the DC voltages to determine whether the analog signals output from the analog semiconductor device are desirable.

Abstract: An apparatus for generating a current source test stimulus signal having a constant current regardless of an internal impedance value of a device under test includes a voltage source generation unit and a voltage to current (V/I) converter. The voltage source generation unit converts source data stored in internal memory into analog signals, and combines the analog signals and a reference signal of D/C voltage level to generate voltage source test stimulus signals. The V/I converter converts the voltage source test stimulus signals into current source test stimulus signals and outputs the current source test stimulus signal to a device under test. The V/I converter maintains the current levels of the current source test stimulus signals at a predetermined value, regardless of the internal impedance of input pins of the device under test. In this manner, the operating efficiency of the device under test can be accurately determined.

Abstract: A test data generator, test system and method thereof are provided. In the example method, parallel test data may be received at a first data rate. The received parallel test data may be converted into serial test data at a second data rate. Noise (e.g., jitter noise, level noise, etc.) may be selectively inserted into the converted serial test data. The noise inserted into the serial test data, which may be configured to operate at a higher data rate than the parallel test data, may allow a device to be tested with higher data-rate test data. The example method may be performed by the example test data generator and/or by the example test system.

Abstract: A digital test apparatus for testing an analog semiconductor device includes a low pass filter which passes only a low frequency analog signal from among analog signals output from the analog semiconductor device, a rectifying unit connected to the low pass filter for converting the analog signal output from the low pass filter into a DC voltage, a high pass filter which passes only a high frequency analog signal from among analog signals output from the analog semiconductor device, a high frequency power detecting unit connected to the high pass filter for converting the analog signal output from the high pass filter into a DC voltage, and a digital measuring unit which is connected to the rectifying unit and the high frequency power detecting unit and measures the DC voltages to determine whether the analog signals output from the analog semiconductor device are desirable.

Abstract: In a system and method for measuring total litter in a high speed data processing device, a high-speed data processing device, as an object under test, receives test data and generates differential output data at a high rate. A test device provides the test data to the high speed data processing device and provides a comparison operation reference clock. A high-speed differential comparator is coupled between the high speed data processing device and the test device for comparing the differential output data of the high speed data processing device in response to the comparison operation reference clock. In this manner, measurement of total jitter in a high speed data processing device can be achieved rapidly and without the need for employing a high-cost measuring instrument.

Abstract: An apparatus for generating a current source test stimulus signal having a constant current regardless of an internal impedance value of a device under test includes a voltage source generation unit and a voltage to current (V/I) converter. The voltage source generation unit converts source data stored in internal memory into analog signals, and combines the analog signals and a reference signal of D/C voltage level to generate voltage source test stimulus signals. The V/I converter converts the voltage source test stimulus signals into current source test stimulus signals and outputs the current source test stimulus signal to a device under test. The V/I converter maintains the current levels of the current source test stimulus signals at a predetermined value, regardless of the internal impedance of input pins of the device under test. In this manner, the operating efficiency of the device under test can be accurately determined.

Abstract: In a system and method for measuring total litter in a high speed data processing device, a high-speed data processing device, as an object under test, receives test data and generates differential output data at a high rate. A test device provides the test data to the high speed data processing device and provides a comparison operation reference clock. A high-speed differential comparator is coupled between the high speed data processing device and the test device for comparing the differential output data of the high speed data processing device in response to the comparison operation reference clock. In this manner, measurement of total jitter in a high speed data processing device can be achieved rapidly and without the need for employing a high-cost measuring instrument.

Abstract: A circuit and a method for measuring rising or falling time of high-speed data are disclosed. The circuit includes a comparator and a storage circuit. The comparator receives the high-speed data via a first port and a reference signal via a second port, compares a level of the high-speed data with a level of the reference signal in response to an enable signal, and outputs the compared result as a signal. A reference signal generator generates the reference signal. An enable signal generator generates the enable signal. The storage circuit receives and stores the signal and measures the rising or falling time of the high-speed data.