Patents by Inventor Jin-nam Kim

Jin-nam Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9728604
    Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: August 8, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Rak-Hwan Kim, Byung-Hee Kim, Jong-Min Baek, Sang-Hoon Ahn, Nae-In Lee, Jong-Jin Lee, Ho-Yun Jeon, Eun-Ji Jung
  • Publication number: 20170133317
    Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes an interlayer insulating film, a first trench having a first width, and a second trench having a second width, the second trench including an upper portion and a lower portion, the second width being greater than the first width, a first wire substantially filling the first trench and including a first metal, and a second wire substantially filling the second trench and including a lower wire and an upper wire, the lower wire substantially filling a lower portion of the second trench and including the first metal, and the upper wire substantially filling an upper portion of the second trench and including a second metal different from the first metal.
    Type: Application
    Filed: October 20, 2016
    Publication date: May 11, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Rak-Hwan KIM, Byung-Hee Kim, Jin-Nam Kim, Jong-Min Baek, Nae-In Lee, Eun-Ji Jung
  • Publication number: 20160300792
    Abstract: Semiconductor devices may include a diffusion prevention insulation pattern, a plurality of conductive patterns, a barrier layer, and an insulating interlayer. The diffusion prevention insulation pattern may be formed on a substrate, and may include a plurality of protrusions protruding upwardly therefrom. Each of the conductive patterns may be formed on each of the protrusions of the diffusion prevention insulation pattern, and may have a sidewall inclined by an angle in a range of about 80 degrees to about 135 degrees to a top surface of the substrate. The barrier layer may cover a top surface and the sidewall of each if the conductive patterns. The insulating interlayer may be formed on the diffusion prevention insulation pattern and the barrier layer, and may have an air gap between neighboring ones of the conductive patterns.
    Type: Application
    Filed: March 3, 2016
    Publication date: October 13, 2016
    Inventors: Jin-Nam KIM, Rak-Hwan Kim, Byung-Hee Kim, Jong-Min Baek, Sang-Hoon Ahn, Nae-In Lee, Jong-Jin Lee, Ho-Yun Jeon, Eun-Ji Jung
  • Publication number: 20160293484
    Abstract: In a method of forming a wiring structure, a lower structure is formed on a substrate. An insulating interlayer is formed on the lower structure. The insulating interlayer is partially removed to form at least one via hole and a dummy via hole. An upper portion of the insulating interlayer is partially removed to form a trench connecting the via hole and the dummy via hole. A first metal layer filling the via hole and the dummy via hole is formed. A second metal layer filling the trench is formed on the first metal layer.
    Type: Application
    Filed: January 19, 2016
    Publication date: October 6, 2016
    Inventors: Jong-Jin Lee, Rak-Hwan Kim, Byung-Hee Kim, Jin-Nam Kim, Tsukasa Matsuda, Wan-Soo Park, Nae-In Lee, Jae-Won Chang, Eun-Ji Jung, Jeong-Ok Cha, Jae-Won Hwang, Jung-Ha Hwang
  • Publication number: 20160276267
    Abstract: Methods of forming wiring structures and methods of manufacturing semiconductor devices include forming a lower structure on a substrate, forming an interlayer insulating film including an opening on the lower structure, forming a liner film on an inner surface of the opening, treating a surface of the liner film by an ion bombardment, and forming a first conductive film on the liner film. The first conductive film is formed to be at least partially filled in the opening through a reflow process. Related wiring structures and semiconductor devices are also discussed.
    Type: Application
    Filed: February 8, 2016
    Publication date: September 22, 2016
    Inventors: Jong-Jin Lee, Rak-Hwan Kim, Byung-Hee Kim, Jin-Nam Kim, Tsukasa Matsuda, Nae-In Lee, Jeong-Ok Cha, Jung-Ha Hwang
  • Publication number: 20160141246
    Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first interlayer insulating layer including a first trench, on a substrate a first liner layer formed along a side wall and a bottom surface of the first trench and including noble metal, the noble metal belonging to one of a fifth period and a sixth period of a periodic chart that follows numbering of International Union of Pure and Applied Chemistry (IUPAC) and belonging to one of eighth to tenth groups of the periodic chart, and a first metal wire filling the first trench on the first liner layer, a top surface of the first metal wire having a convex shape toward a bottom surface of the first trench.
    Type: Application
    Filed: October 27, 2015
    Publication date: May 19, 2016
    Inventors: Jin-Nam Kim, Tsukasa Matsuda, Rak-Hwan Kim, Byung-Hee Kim, Nae-In Lee, Jong-Jin Lee
  • Patent number: D614613
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Chol-Ho Hwang
  • Patent number: D626541
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: November 2, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Chol-Ho Hwang
  • Patent number: D758681
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: June 7, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-Eun Park, Kang-Doo Kim, Jin-Nam Kim, Dong-Won Chun, Sung-Kyung Lee
  • Patent number: D787763
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D787764
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: May 23, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D788389
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: May 30, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D788390
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: May 30, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D788391
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: May 30, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D789631
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: June 13, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D794269
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: August 8, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D794886
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: August 15, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D794887
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: August 15, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D797388
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: September 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun
  • Patent number: D797389
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: September 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Nam Kim, Ji-Yeun Yoon, Dong-Won Chun