Abstract: For sharpening an input image by up-converting the input image in order to increase the number of pixels of an image and generating a frequency component higher than a frequency component contained in an input image signal representing the input image, the number of multipliers is reduced, thereby achieving significant downsizing of an apparatus and cost reduction. An image processing apparatus includes a path on a base image side for up-converting the input image signal and a path on a sharpening processing side for carrying out nonlinear arithmetic processing on the input image signal. The path on the sharpening processing side includes an up-converter at a subsequent stage of at least one filter, after which the nonlinear arithmetic processing is carried out. The at least one filter may be either a two-dimensional low pass filter for noise removal or a high pass filter for removing a DC component.

Abstract: An image is sharpened by using a frequency component exceeding a Nyquist frequency. In particular, an image processing apparatus 100 of the disclosure herein for generating an output image by sharpening an input image includes a first nonlinear processing unit 101 configured to generate a first signal by carrying out nonlinear processing on an input image signal representing the input image, a sharpening processing block 102 configured to generate a second signal containing a frequency component higher than a frequency component contained in the first signal by carrying out sharpening processing on the first signal, and an adder 103 configured to generate an output image signal representing the output image by adding the second signal to the input image signal.

Abstract: An image is sharpened by using a frequency component exceeding a Nyquist frequency. In particular, an image processing apparatus 100 of the disclosure herein for generating an output image by sharpening an input image includes a first nonlinear processing unit 101 configured to generate a first signal by carrying out nonlinear processing on an input image signal representing the input image, a sharpening processing block 102 configured to generate a second signal containing a frequency component higher than a frequency component contained in the first signal by carrying out sharpening processing on the first signal, and an adder 103 configured to generate an output image signal representing the output image by adding the second signal to the input image signal.

Abstract: An image is sharpened by using a frequency component exceeding a Nyquist frequency. In particular, an image processing apparatus 100 of the disclosure herein for generating an output image by sharpening an input image includes a first nonlinear processing unit 101 configured to generate a first signal by carrying out nonlinear processing on an input image signal representing the input image, a sharpening processing block 102 configured to generate a second signal containing a frequency component higher than a frequency component contained in the first signal by carrying out sharpening processing on the first signal, and an adder 103 configured to generate an output image signal representing the output image by adding the second signal to the input image signal.

Abstract: For sharpening an input image by up-converting the input image in order to increase the number of pixels of an image and generating a frequency component higher than a frequency component contained in an input image signal representing the input image, the number of multipliers is reduced, thereby achieving significant downsizing of an apparatus and cost reduction. An image processing apparatus includes a path on a base image side for up-converting the input image signal and a path on a sharpening processing side for carrying out nonlinear arithmetic processing on the input image signal. The path on the sharpening processing side includes an up-converter at a subsequent stage of at least one filter, after which the nonlinear arithmetic processing is carried out. The at least one filter may be either a two-dimensional low pass filter for noise removal or a high pass filter for removing a DC component.

Abstract: An image is sharpened without generating, in frequency domain exceeding frequency component in horizontal and vertical direction, frequency component caused by sharpening carried out in horizontal and vertical direction in overlapping manner.

Abstract: An image is sharpened without generating, in frequency domain exceeding frequency component in horizontal and vertical direction, frequency component caused by sharpening carried out in horizontal and vertical direction in overlapping manner.

Abstract: A locking-status judging circuit is composed of a comparator that compares a phase error signal with a reference signal for judging whether or not a digital PLL circuit locks on an input signal and outputs a signal “0 (zero)” or a signal “1 (one)”, a selector that outputs a positive or negative number in response to the inputted signal whether it is “0” or “1”, a limiter that limits an accumulated number to be within a range of prescribed upper and lower limits, a feedback section that returns the accumulated number, an accumulator that adds the accumulated number and a positive or negative number from the selector and outputs a newly accumulated number, and a lock-state judging section that judges the digital PLL circuit whether it is in a lock-state or an unlock-state in response to an accumulated value of the newly accumulated number whether it is positive or negative.

Abstract: A locking-status judging circuit (3) is composed of a comparator (311), which compares a phase error signal outputted from a digital PLL circuit with a reference signal to be utilized for judging whether or not the digital PLL circuit locks on an input signal and outputs a signal “0 (zero)” in case the reference signal is larger than the phase error signal or a signal “1 (one)” in case the reference signal is smaller than the phase error signal, a selector (312), which outputs a positive number in case the signal “0” is inputted or a negative number in case the signal “1” is inputted, a limiter (322), which limits an accumulated number in positive or negative to be within a range of prescribed upper and lower limits, a feedback section (323), which returns the accumulated number within the limited range, an accumulator (321), which adds the accumulated number returned from the feedback section (323), and either one of a positive number and a negative number outputted from the selector (312), and outputs a new

Abstract: A data recording and reproducing apparatus includes a rotary head for recording a signal on a tape-like recording medium while successively forming tracks thereon, and for reproducing a signal from the tape-like recording medium. Each of the tracks has a front margin area, an effective data area, and a rear margin area. A flag is generated which represents which of different speeds the rotary head rotates at. The generated flag is inserted into the signal before the signal is recorded on the tape-like recording medium by the rotary head. Thereby, the flag is recorded on the effective data area. A data rate of the signal recorded on the tape-like recording medium is maintained at a constant rate independent of which of the different speeds the rotary head rotates at.

Abstract: A first area and a second area are allocated in a direction of the radius of a disk-type storage medium. The first area is used for simultaneous recording and reproduction, on which data are sequentially recorded while data that have been recorded thereon are reproduced. The second area is used for regular recording and reproduction, on which data not for the simultaneous recording and reproduction are recorded. Sequential addresses corresponding to the first area are generated. Data for the simultaneous recording and reproduction are sequentially recorded on the first area according the sequential addresses so that the first area becomes a physically continuous area without interposing the second area.

Abstract: A drum servo system is provided with a rotation control device for controlling the rotation of a drum on the basis of a phase comparison signal obtained as a result of comparing the phase of an angle-of-rotation information signal obtained according to an angle of rotation of the drum with the phase of a control signal. The system also includes a detection device for determining the existence of a large data block or a small path block and outputting the result to a reference signal generator. The frequency of the reference signal is higher than that of the control signal, and is altered based on the output of the detection device. Frequency division is performed on the reference signal after it has been acted on by a phase locked loop, and the result is compared to the phase of the angle-of-rotation information signal in the rotation control device.

Abstract: A clock signal selection circuit includes a delay for delaying a switching control signal to supply a delayed switching control signal. A first selection circuit changes its state between first and second states in response to the switching control signal. A second selection circuit changes its circuit condition between third and fourth states in response to the switching control signal and the output of first selection circuit. The second selection circuit outputs a second clock signal when operated in the third state and inhibits the second clock signal in the fourth state. The first selection circuit supplies the first clock signal when operated in the first state and inhibits the first clock signal from being supplied when operated in the second state in response to the switching control signal and the output of second selection circuit. A third selection circuit transmits the switching control signal to either the first or second selection circuit in response to the delayed control signal.