Patents by Inventor Jin Pan

Jin Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180252772
    Abstract: A testing system and process comprises a converged test platform for structural testing and system testing of an integrated circuit device. The testing system comprises a converged test platform supported by a baseboard of an automated test assembly. The converged test platform comprises a DUT socket for testing an integrated circuit device, at least one testing electronic component selectively electrically coupled to the DUT socket by at least one switch operable to electrically switch at least some testing signals between the automated testing assembly and the DUT socket to the at least one testing electronic component for both structural testing and system testing of the integrated circuit device within the same test flow. The switch(es) and testing electronic component(s) (e.g., an FPGA) can be reprogrammable for testing flexibility and faster through put. Associated processes and methods are provided for both class and system testing using the converged test platform for back-end and front-end testing.
    Type: Application
    Filed: March 1, 2017
    Publication date: September 6, 2018
    Applicant: Intel Corporation
    Inventors: Abram M. Detofsky, Evan M. Fledell, Mustapha A. Abdulai, John M. Peterson, Dinia P. Kitendaugh, Pooya Tadayon, Jin Pan, David Shia
  • Publication number: 20180188288
    Abstract: In one embodiment, a device to test one or more electronic components comprises a first card comprising a first test device communicatively coupled to at least a first connector assembly positioned on the first card and a second card comprising a second test device communicatively coupled to at least a second connector assembly positioned on the second card. The at least a first connector assembly is directly communicatively coupled to the at least a second connector assembly to provide a direct communication interface between the first test device and the second test device that is not routed via a backplane. Other embodiments may be described.
    Type: Application
    Filed: December 29, 2016
    Publication date: July 5, 2018
    Applicant: Intel Corporation
    Inventors: Erkan Acar, Abram M. Detofsky, Jin Pan
  • Publication number: 20170336461
    Abstract: A transformer internal composite defect fuzzy diagnosis method based on gas dissolved in oil, comprising: a step of acquiring monitoring data of volume concentrations of five types of monitored feature gas; a step of determining ratio codes; a step of modifying a three-ratio method; a step of fuzzifying a boundary range; a step of calculating probabilities of the ratio codes; a step of calculating a probability of occurrence of each defect fault; and finally obtaining a fault type of a transformer.
    Type: Application
    Filed: August 5, 2015
    Publication date: November 23, 2017
    Inventors: Shuguo GAO, Hui FAN, Zhiyong CHEN, Jin PAN, Hongliang LIU, Jun ZHAO
  • Patent number: 9506980
    Abstract: In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 29, 2016
    Assignee: INTEL CORPORATION
    Inventors: Abram M. Detofsky, Brett D. Grossman, Jin Pan, John M. Peterson, Ronald K. Minemier
  • Patent number: 9484833
    Abstract: The present invention discloses a system and a method for controlling PCS voltage and frequency, wherein the system comprises a reference voltage converter, a phase-locked loop, a grid-side voltage converter, a voltage transformer, a first proportional integral controller, a second proportional integral controller, a coordinate converter and a SVPWM generator; a reference voltage converter is connected to an output terminal of a the phase-locked loop, and the output terminal of the phase-locked loop is further connected to a grid-side voltage converter; the grid-side voltage converter is connected to a high-voltage side of an isolating transformer of the electric grid via the voltage transformer; two output terminals of the grid-side voltage converter are respectively connected to the coordinate converter via two proportional integral controllers; an output terminal of the coordinate converter is connected to the SVPWM generator; an output terminal of the SVPWM generator is connected to a power switch of the
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: November 1, 2016
    Assignees: State Grid Corporation of China, Xuancheng Power Supply Company of State Grid Anhui Electric Power Corporation, Beijing Hua Teng Kai Yuan Electric Company Limited
    Inventors: Yeru Zhou, Jian Wang, Dongsheng Fu, Xiaoma Jin, Dongsheng Zou, Jin Pan, Yi Song, Jianzhou Cheng, Tianwen Zheng, Jianming Wu, Hongbo Luo
  • Publication number: 20160299174
    Abstract: A microelectronic test device comprising an organic substrate, a probe holder, and an interposer disposed between the organic substrate and the probe holder, wherein the interposer has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the organic substrate. The interposer may effectively decouple the organic substrate from probes in the probe holder, which may substantially reduce or eliminate probe misalignment due to the coefficient of thermal expansion mismatch between the organic substrate and other components of the microelectronic test device and to provide require stiffness to the organic substrate.
    Type: Application
    Filed: April 10, 2015
    Publication date: October 13, 2016
    Inventors: Jin Pan, Jin Yang, Erkan Acar
  • Publication number: 20160006364
    Abstract: The present invention discloses a system and a method for controlling PCS voltage and frequency, wherein the system comprises a reference voltage converter, a phase-locked loop, a grid-side voltage converter, a voltage transformer, a first proportional integral controller, a second proportional integral controller, a coordinate converter and a SVPWM generator; a reference voltage converter is connected to an output terminal of a the phase-locked loop, and the output terminal of the phase-locked loop is further connected to a grid-side voltage converter; the grid-side voltage converter is connected to a high-voltage side of an isolating transformer of the electric grid via the voltage transformer; two output terminals of the grid-side voltage converter are respectively connected to the coordinate converter via two proportional integral controllers; an output terminal of the coordinate converter is connected to the SVPWM generator; an output terminal of the SVPWM generator is connected to a power switch of the
    Type: Application
    Filed: December 24, 2013
    Publication date: January 7, 2016
    Inventors: Yeru Zhou, Jian Wang, Dongsheng Fu, Xiaoma Jin, Dongsheng Zou, Jin Pan, Yi Song, Jianzhou Cheng, Tianwen Zheng, Jianming Wu, Hongbo Luo
  • Publication number: 20150243881
    Abstract: Embodiments of the present disclosure are directed towards magnetic shielded integrated circuit (IC) package assemblies and materials for shielding integrated circuits from external magnetic fields. In one embodiment, a package assembly includes a die coupled with a package substrate and a mold compound disposed on the die. The mold compound includes a matrix component and magnetic field absorbing particles. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: October 15, 2013
    Publication date: August 27, 2015
    Inventors: Robert L. Sankman, Dmitri E. Nikonov, Jin Pan
  • Patent number: 9091823
    Abstract: An optical fiber connector includes a housing, a fixing member, an optical fiber ferrule fixed at an end of the fixing member, and an elastic member sleeved on an end of the fixing member. The housing includes a latching protrusion, and the fixing member includes a latching portion. The fixing member is received in the housing with the latching portion engaging with the latching protrusion, and one end of the elastic member resists on the housing and the other end of the elastic member abuts against the fixing member.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: July 28, 2015
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Po-Hsun Shen, Bing Su, Jun-Jin Pan
  • Patent number: 9063296
    Abstract: A waterproof optical fiber assembly includes an optical fiber connector mating with an optical fiber adapter. The optical fiber connector includes a fiber joining head, a sealing member, a sleeve, a housing, and a boot. The sleeve defines an annular groove for receiving the sealing member and two latching protrusions adjacent to the annular groove, the housing defines two unlocking grooves for the two latching protrusions, the fiber joining head is sleeved in the sleeve adjacent to the annular groove, the housing is fitted around an end of the sleeve away from the fiber joining head. The optical fiber adapter includes an assembling seat including a base board, a barrel, and two elastic arms.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: June 23, 2015
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Min Dong, Jun-Jin Pan, Leland Wang
  • Patent number: 8963135
    Abstract: Three dimensional integrated circuits including semiconductive organic materials are described. In some embodiments, the three dimensional integrated circuits include one or more electronic components that include a semiconductive region formed of one or more semiconductive organic materials. The electronic components of the three dimensional integrated circuits may also include insulating regions formed from organic insulating materials, and conductive regions form from conductive materials. The three dimensional integrated circuits may be formed by an additive manufacturing process such as three dimensional printing. Apparatus and methods for producing and testing three dimensional integrated circuits are also described.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: February 24, 2015
    Assignee: Intel Corporation
    Inventors: Dmitri E. Nikonov, Robert L. Sankman, Raseong Kim, Jin Pan
  • Publication number: 20150032668
    Abstract: There is provided an information processing apparatus including a processor which executes a function of acquiring activity information indicating at least an activity of a subject, the activity information being inputted by an inputter, a function of generating support information supporting the activity of the subject on the basis of the activity information, and a function of controlling an output of the support information to the inputter or an observer who is different from the subject and the inputter on the basis of the support information or the activity information.
    Type: Application
    Filed: June 10, 2014
    Publication date: January 29, 2015
    Inventors: Naoya SAZUKA, Shinako MATSUYAMA, Jingjing GUO, Jin PAN
  • Patent number: 8941362
    Abstract: There is provided a charging apparatus including a connection unit to which a device is to be connected, a charging unit for charging the device connected to the connection unit, a history acquisition unit for acquiring a history of content use stored in the device, a timing prediction unit for predicting a timing of use of the device based on the history of content use acquired by the history acquisition unit, and a charge control unit for controlling the charging unit such that the device connected to the connection unit becomes fully charged at a timing suitable for the timing predicted by the timing prediction unit.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: January 27, 2015
    Assignee: Sony Corporation
    Inventors: Junko Saito, Hiroshi Kawashima, Kei Yamashita, Tomoyuki Ono, Masaya Kimura, Kayoko Tanaka, Hideki Noma, Jin Pan, Yukiyoshi Hirose, Ryoki Honjo, Itaru Kawakami
  • Patent number: 8891235
    Abstract: A thermal interface unit includes a pedestal, a first contact surface below the pedestal to interface with a first die and a flat spring to enable the first contact surface to adapt to a variable height of a first die of a multi-chip package (MCP).
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: November 18, 2014
    Assignee: Intel Corporation
    Inventors: Joseph F. Walczyk, Jin Yang, James G. Maveety, Todd P. Albertson, Ashish Gupta, Jin Pan, Arun Krishnamoorthy
  • Patent number: 8882363
    Abstract: An optical fiber assembly includes an optical fiber connector, and an optical fiber adapter mating with the optical fiber connector. The optical fiber connector includes a fiber joining assembly, a first sealing member, an elastic member, and a housing assembly sleeved on the fiber joining assembly. The elastic member is slidably sleeved in the housing assembly with two ends of the elastic member resisting with the housing assembly. The optical fiber adapter includes a base board, a fixing seat protruding out from the base board, and a second sealing member sleeved on the outer surface of the fixing seat. The optical fiber adapter further includes two latching arms protruding out from the base board positioned at opposite sides of the fixing seat. The fixing seat axially defines an assembling groove for receiving the fiber joining assembly of the optical fiber connector.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: November 11, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Min Dong, Jun-Jin Pan, Leland Wang
  • Publication number: 20140266285
    Abstract: In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Abram M. DETOFSKY, Brett D. GROSSMAN, Jin PAN, John M. PETERSON, Ronald K. MINEMIER
  • Publication number: 20140258081
    Abstract: Provided is an information processing apparatus including a read/write unit configured so as to be capable of reading, via contactless communication, electronic money information from an IC card capable of storing the electronic money information or an electronic appliance equipped with functions of the IC card and of writing the electronic money information into the IC card or the electronic appliance, and a settlement processing unit configured to write electronic money information of a fee in accordance with a power sale amount via the read/write unit into the IC card or the electronic appliance immediately after conclusion of a power sale contract.
    Type: Application
    Filed: October 5, 2012
    Publication date: September 11, 2014
    Applicant: Sony Corporation
    Inventor: Jin Pan
  • Patent number: 8821032
    Abstract: An optical fiber connector includes an inner housing and a fixing module sleeved in the inner housing. The fixing module includes a support member and a fastening assembly fastened to the support member. The support member has a fixing portion, and the fixing portion defines a first restricting groove. The fastening assembly includes a fastener, a fixing member, an elastic member, and a pressing member. The fixing member defines a second restricting groove. The fastener sleeves on the fixing member and the elastic member. The fastener engages with the support member, and then the elastic member is resisted between the fixing member and the fastener, thereby generating an elastic force to drive the fixing member to abut against the fixing portion. The pressing member slidably engages with the support member and resists the fixing member.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: September 2, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Bing Su, Po-Hsun Shen, Jun-Jin Pan, Leland Wang
  • Patent number: 8757896
    Abstract: An adapter for an optical fiber connector includes a fixing base and two terminals. The fixing base has a main portion and two assembly portions formed on the main portion. The terminal has a positioning portion, a connecting portion, and an inserting portion. The connecting portion and the inserting portion extend from opposite ends of the positioning portion, and the positioning portion is positioned in the assembly portion of the fixing base.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: June 24, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Leland Wang, Jun-Jin Pan, Min Dong
  • Publication number: 20140152383
    Abstract: Three dimensional integrated circuits including semiconductive organic materials are described. In some embodiments, the three dimensional integrated circuits include one or more electronic components that include a semiconductive region formed of one or more semiconductive organic materials. The electronic components of the three dimensional integrated circuits may also include insulating regions formed from organic insulating materials, and conductive regions form from conductive materials. The three dimensional integrated circuits may be formed by an additive manufacturing process such as three dimensional printing. Apparatus and methods for producing and testing three dimensional integrated circuits are also described.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Inventors: DMITRI E. NIKONOV, ROBERT L. SANKMAN, RASEONG KIM, JIN PAN