Patents by Inventor Jin Pyo Hong

Jin Pyo Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12361267
    Abstract: Disclosed is an operation method of a neural network element using a Hall voltage. The neural network element has a hole pattern portion, and the hole pattern portion has a cross shape. When a pulse current is applied, horizontal magnetic anisotropy is formed in a ferromagnetic layer by means of spin-orbit torque, and when an external magnetic field in a direction perpendicular to the pulse current is applied, the inversion of magnetization occurs by means of additional torque. The movement of a magnetic domain wall is performed by the inversion of magnetization, spin electrons applied thereby are scattered, and a Hall voltage is generated according to the anomalous Hall effect. The generated Hall voltage increases according to the number of applications of the pulse current or pulse voltage.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: July 15, 2025
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo Hong, Seung Mo Yang
  • Publication number: 20250114183
    Abstract: One embodiment of the present invention relates to an artificial blood vessel installed with a piezoelectric vibration element. In the artificial blood vessel according to one embodiment of the present invention, a piezoelectric vibration element is installed at one or both ends of a polymer tube, and vibration occurs in the piezoelectric vibration element according to an electrical signal. As a result, the formation of blood clots or the overgrowth of the intima can be prevented at the anastomotic site where the artificial blood vessel and the native blood vessel are joined, thereby improving the vascular patency rate and preventing stenosis.
    Type: Application
    Filed: July 1, 2022
    Publication date: April 10, 2025
    Inventors: Jin Pyo HONG, Woo Jong KIM
  • Patent number: 12274178
    Abstract: Disclosed is logic device using spin orbit torque. Two magnetic tunnel junctions have mutually opposite magnetization directions. The direction of the current flowing through the non-magnetic metal layer acts as an input, and the resistance states of the magnetic tunnel junctions are determined by the input program currents. Various logic devices are implemented by a method of setting the input program current to a logic high or a logic low.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: April 8, 2025
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jin Pyo Hong, Jeong Hun Shin, Jeong Woo Seo
  • Patent number: 12108683
    Abstract: A magnetic tunnel junction device and an operating method thereof are disclosed. The magnetization switching of a free layer may be induced through spin orbit torque or spin transfer torque, and a magnetization direction of a pinned layer may be easily set according to the intention of a designer through ferromagnetic coupling and antiferromagnetic coupling.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: October 1, 2024
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jin Pyo Hong, Jeong Hun Shin, Yoon Seong Choi
  • Publication number: 20240322031
    Abstract: The present invention relates to a transistor based on a compact drain and hetero-material structure. The transistor according to one embodiment includes substrates including a buried oxide (BOX) layer and active layers formed on the buried oxide layer; an insulating layer formed on the substrates; and electrode layers formed on the insulating layer and including a drain electrode, a gate electrode, and a source electrode. The active layers include a first semiconductor layer corresponding to a drain region, a second semiconductor layer corresponding to a channel region, and a third semiconductor layer corresponding to a source region. The first semiconductor layer is formed to be thinner than the second semiconductor layer, and the third semiconductor layer is formed of a material having a band gap lower than that of the second semiconductor layer.
    Type: Application
    Filed: July 12, 2022
    Publication date: September 26, 2024
    Inventors: Jea Gun PARK, Jin Pyo HONG, Min Won KIM, Byoung Seok LEE, Ji Hun KIM
  • Patent number: 11917926
    Abstract: Disclosed are a synthetic antiferromagnetic material using the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction and a multibit memory using the synthetic antiferromagnetic material that is formed. The synthetic antiferromagnetic material has a non-magnetic metal layer as an RKKY inducing layer in the center, interaction between upper and lower ferromagnetic layers is imparted according to the thickness of the RKKY inducing layer, and the magnetization of an anti-parallel state is maximized therebetween. When such synthetic antiferromagnetic materials are cumulatively stacked and tunnel barrier layers are provided therebetween, multiple bits can be stored. Namely, data may be stored by supplying a program current in parallel to the surface of the RKKY inducing layer, and a resistance state may be checked by supplying current in a vertical direction to the surface of the RKKY inducing layer.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: February 27, 2024
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventor: Jin Pyo Hong
  • Publication number: 20230320233
    Abstract: A spin-orbit-torque (SOT)-based magnetic sensor is provided. The magnetic sensor includes a substrate, an electrode layer formed on the substrate, and a pair of first and second sensing elements stacked on the substrate so as to be connected to the electrode layer, wherein directions of respective currents flowing through the first and second sensing elements via the electrode layer are opposite to each other.
    Type: Application
    Filed: June 16, 2022
    Publication date: October 5, 2023
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Ji-Sung Lee, Su-Jung Noh, Han-Saem Lee, Joon-Hyun Kwon, Jeong-Woo Seo, Jeong-Hun Shin, Jin-Pyo Hong
  • Publication number: 20230309323
    Abstract: Disclosed is a selective device having high selectivity and temperature stability. The selective device has a doped insulating layer. The doped insulating layer has a metal oxide and a chalcogen element introduced into the metal oxide. Metal oxide has amorphous structure with minimized defects, and the introduced chalcogen elements form a conductive channel at a specific voltage and realize bi-directional switching characteristics.
    Type: Application
    Filed: September 6, 2021
    Publication date: September 28, 2023
    Applicant: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventor: Jin Pyo HONG
  • Publication number: 20230119656
    Abstract: Disclosed is logic device using spin orbit torque. Two magnetic tunnel junctions have mutually opposite magnetization directions. The direction of the current flowing through the non-magnetic metal layer acts as an input, and the resistance states of the magnetic tunnel junctions are determined by the input program currents. Various logic devices are implemented by a method of setting the input program current to a logic high or a logic low.
    Type: Application
    Filed: February 25, 2021
    Publication date: April 20, 2023
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jin Pyo HONG, Jeong Hun SHIN, Jeong Woo CHOI
  • Publication number: 20230083328
    Abstract: A magnetic tunnel junction device and an operating method thereof are disclosed. The magnetization switching of a free layer may be induced through spin orbit torque or spin transfer torque, and a magnetization direction of a pinned layer may be easily set according to the intention of a designer through ferromagnetic coupling and antiferromagnetic coupling.
    Type: Application
    Filed: January 8, 2021
    Publication date: March 16, 2023
    Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jin Pyo HONG, Jeong Hun SHIN, Yoon Seong CHOI
  • Patent number: 11522134
    Abstract: Disclosed is a method of fabricating a resistive switching memory. A method of fabricating a resistive switching memory according to an embodiment of the present invention includes a step of forming a lower electrode on a substrate; a step of forming a resistive switching layer on the lower electrode using sputtering; and a step of forming an upper electrode on the resistive switching layer, wherein, in the step of forming a resistive switching layer on the lower electrode using sputtering, the substrate is disposed in a region, which is not reached by plasma generated by the first and second targets, between the first target and the second target disposed above the substrate to deposit the resistive switching layer.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: December 6, 2022
    Assignee: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Jin Pyo Hong, Da Seul Hyeon, Gwang Ho Baek, Gabriel Jang, Tae Yoon Kim
  • Publication number: 20220263014
    Abstract: Disclosed are a synthetic antiferromagnetic material using the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction and a multibit memory using the synthetic antiferromagnetic material that is formed. The synthetic antiferromagnetic material has a non-magnetic metal layer as an RKKY inducing layer in the center, interaction between upper and lower ferromagnetic layers is imparted according to the thickness of the RKKY inducing layer, and the magnetization of an anti-parallel state is maximized therebetween. When such synthetic antiferromagnetic materials are cumulatively stacked and tunnel barrier layers are provided therebetween, multiple bits can be stored. Namely, data may be stored by supplying a program current in parallel to the surface of the RKKY inducing layer, and a resistance state may be checked by supplying current in a vertical direction to the surface of the RKKY inducing layer.
    Type: Application
    Filed: June 23, 2020
    Publication date: August 18, 2022
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventor: Jin Pyo HONG
  • Publication number: 20220165950
    Abstract: A selection device and a crosspoint memory including the same are provided. The selection device has a lower electrode. A polycrystalline metal oxide layer including insulating crystal grains and a conductive nanochannel formed in a grain boundary between the crystal grains is disposed on the lower electrode. An upper electrode is disposed on the polycrystalline metal oxide layer.
    Type: Application
    Filed: January 29, 2020
    Publication date: May 26, 2022
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo HONG, Gabriel JANG
  • Publication number: 20220114428
    Abstract: Disclosed is an operation method of a neural network element using a Hall voltage. The neural network element has a hole pattern portion, and the hole pattern portion has a cross shape. When a pulse current is applied, horizontal magnetic anisotropy is formed in a ferromagnetic layer by means of spin-orbit torque, and when an external magnetic field in a direction perpendicular to the pulse current is applied, the inversion of magnetization occurs by means of additional torque. The movement of a magnetic domain wall is performed by the inversion of magnetization, spin electrons applied thereby are scattered, and a Hall voltage is generated according to the anomalous Hall effect. The generated Hall voltage increases according to the number of applications of the pulse current or pulse voltage.
    Type: Application
    Filed: December 31, 2019
    Publication date: April 14, 2022
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo HONG, Seung Mo YANG
  • Patent number: 11258009
    Abstract: Disclosed are a switching atomic transistor with a diffusion barrier layer and a method of operating the same. By introducing a diffusion barrier layer in an intermediate layer having a resistance change characteristic, it is possible to minimize variation in the entire number of ions in the intermediate layer involved in operation of the switching atomic transistor or to eliminate the variation to maintain stable operation of the switching atomic transistor. In addition, it is possible to stably implement a multi-level cell of a switching atomic transistor capable of storing more information without increasing the number of memory cells. Also, disclosed are a vertical atomic transistor with a diffusion barrier layer and a method of operating the same. By producing an ion channel layer in a vertical structure, it is possible to significantly increase transistor integration.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: February 22, 2022
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo Hong, Gwang Ho Baek, Ah Rahm Lee, Tae Yoon Kim
  • Publication number: 20210167286
    Abstract: Disclosed is a method of fabricating a resistive switching memory. A method of fabricating a resistive switching memory according to an embodiment of the present invention includes a step of forming a lower electrode on a substrate; a step of forming a resistive switching layer on the lower electrode using sputtering; and a step of forming an upper electrode on the resistive switching layer, wherein, in the step of forming a resistive switching layer on the lower electrode using sputtering, the substrate is disposed in a region, which is not reached by plasma generated by the first and second targets, between the first target and the second target disposed above the substrate to deposit the resistive switching layer.
    Type: Application
    Filed: May 3, 2019
    Publication date: June 3, 2021
    Applicant: IUCF-HYU (Industry-Univesity Cooperation Foundation Hanyang University)
    Inventors: Jin Pyo HONG, Da Seul HYEON, Gwang Ho BAEK, Gabriel JANG, Tae Yoon KIM
  • Patent number: 11022662
    Abstract: A three-axis magnetic sensor which is not physically separated from each other and made of one element is provided. A spin-orbit torque is generated through an interface junction between a magnetization seed layer and a magnetization free layer, and through this, a change in an in-plane magnetic field may be sensed in the form of current or voltage in the magnetization seed layer. Further, a tunneling insulating layer and a magnetization pinned layer are formed on the magnetization free layer. The formed structure induces a tunnel magneto-resistance phenomenon. Through this, a change in a magnetic field in a vertical direction is sensed.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: June 1, 2021
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo Hong, Seung Mo Yang, Hae Soo Park
  • Publication number: 20210140851
    Abstract: Disclosed are a system and a method for automatic diagnosis of a power generation facility, and a system for automatic diagnosis of a power generation facility which include a data measuring unit for acquiring vibration data from a rotating body of a power facility, a signal processing unit for signal-processing acquired vibration data, and extracting and quantifying predetermined characteristic factors with respect to a time domain, a frequency domain, and a shape area, a characteristic pattern storage unit for storing a characteristic factor pattern classified for each failure type, and a failure diagnosis unit for diagnosing whether a power facility to be diagnosed has a failure and a failure type of the power facility, on the basis of a classified characteristic factor pattern.
    Type: Application
    Filed: August 23, 2017
    Publication date: May 13, 2021
    Inventors: Yeon Whan KIM, Dong Hwan KIM, Doo Young LEE, Bum Soo KIM, Jin Pyo HONG, Joon Ha JUNG, Byung Chul JEON
  • Publication number: 20210104667
    Abstract: Disclosed are a switching atomic transistor with a diffusion barrier layer and a method of operating the same. By introducing a diffusion barrier layer in an intermediate layer having a resistance change characteristic, it is possible to minimize variation in the entire number of ions in the intermediate layer involved in operation of the switching atomic transistor or to eliminate the variation to maintain stable operation of the switching atomic transistor. In addition, it is possible to stably implement a multi-level cell of a switching atomic transistor capable of storing more information without increasing the number of memory cells. Also, disclosed are a vertical atomic transistor with a diffusion barrier layer and a method of operating the same. By producing an ion channel layer in a vertical structure, it is possible to significantly increase transistor integration.
    Type: Application
    Filed: December 16, 2020
    Publication date: April 8, 2021
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo HONG, Gwang Ho BAEK, Ah Rahm LEE, Tae Yoon KIM
  • Patent number: 10923656
    Abstract: Disclosed are a switching atomic transistor with a diffusion barrier layer and a method of operating the same. By introducing a diffusion barrier layer in an intermediate layer having a resistance change characteristic, it is possible to minimize variation in the entire number of ions in the intermediate layer involved in operation of the switching atomic transistor or to eliminate the variation to maintain stable operation of the switching atomic transistor. In addition, it is possible to stably implement a multi-level cell of a switching atomic transistor capable of storing more information without increasing the number of memory cells. Also, disclosed are a vertical atomic transistor with a diffusion barrier layer and a method of operating the same. By producing an ion channel layer in a vertical structure, it is possible to significantly increase transistor integration.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: February 16, 2021
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jin Pyo Hong, Gwang Ho Baek, Ah Rahm Lee, Tae Yoon Kim