Patents by Inventor Jin Seong KANG

Jin Seong KANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240149254
    Abstract: Provided herein are a method for producing a hydrocarbon adsorption catalyst includes dealuminated zeolite by heat-treating a zeolite in moisture-containing air at a first temperature to remove a portion of aluminum included in the zeolite, and supporting a metal on a carrier including the zeolite after the heat-treating and a hydrocarbon adsorption catalyst prepared using the same method. The metal-supported support may be additionally heat-treated in moisture-containing air at a second temperature that is higher than the first temperature.
    Type: Application
    Filed: March 15, 2023
    Publication date: May 9, 2024
    Inventors: Chun Yong Kang, Eunhee Jang, Jungkyu Choi, Jaehee Shim, Jin Seong Kim
  • Publication number: 20240145346
    Abstract: A semiconductor device includes a substrate with a conductive pattern. A semiconductor die is electrically connected to the substrate and both the semiconductor die and the substrate are at least partially covered by a package body. In some examples, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In some examples, through-mold vias are included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body. In some examples, an interposer is electrically connected to the through-mold vias and may be covered by the package body and/or disposed in spaced relation thereto. In some examples, the interposer may not be electrically connected to the through-mold vias but may have one or more semiconductor dies of the semiconductor device electrically connected thereto.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd
    Inventors: Dong Joo PARK, Jin Seong KIM, Ki Wook LEE, Dae Byoung KANG, Ho CHOI, Kwang Ho KIM, Jae Dong KIM, Yeon Soo JUNG, Sung Hwan CHO
  • Patent number: 11922624
    Abstract: An apparatus for providing brain lesion information based on an image includes a magnetic resonance angiography (MRA) provider configured to provide an environment capable of displaying 3D time-of-flight magnetic resonance angiography (3D TOF MRA) using user input, a brain lesion input unit configured to generate and manage a brain lesion image, a maximum intensity projection (MIP) converter configured to configure MIP image data including at least one image frame corresponding to a projection position of the brain lesion image, a noise remover configured to remove noise of brain lesion information and to configure corrected MIP image data, from which the noise is removed, and an MRA reconfiguration unit configured to reconfigure a corrected brain lesion image by back-projecting the corrected MIP image data.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: March 5, 2024
    Assignee: JLK INC.
    Inventors: Won Tae Kim, Shin Uk Kang, Myung Jae Lee, Dong Min Kim, Jin Seong Jang
  • Patent number: 10168723
    Abstract: A reference voltage generator includes a mirroring circuit generating a first sub-voltage and a second sub-voltage that are constant, a first voltage generator including a first switch generating a first voltage based on the first sub-voltage, and a second voltage generator including a second switch generating a second voltage that is lower than the first voltage based on the second sub-voltage, wherein the second switch has a threshold voltage that is lower than the first switch to keep a voltage difference between the first voltage and the second voltage as a first reference voltage.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: January 1, 2019
    Assignee: SK Hynix Inc.
    Inventor: Jin Seong Kang
  • Patent number: 9886986
    Abstract: Provided herein are a voltage regulator, a memory system having the same and an operation method thereof. The memory system includes a memory device configured to store data, a controller configured to control the memory device, and a voltage regulator configured to supply a pump-out voltage to the memory device or the controller so that the memory device or the controller is operated in the following manner: until a level of the pump-out voltage is increased to a second reference voltage lower than a first reference voltage, the pump-out voltage is output using a clock having a first frequency; when the pump-out voltage exceeds the second reference voltage and does not exceed the first reference voltage, the pump-out voltage is output using a clock having a second frequency lower than the first frequency; and when the pump-out voltage exceeds the first reference voltage, the pump-out voltage is output using the clock having the first frequency.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: February 6, 2018
    Assignee: SK hynix Inc.
    Inventors: Ki Soo Kim, Jin Seong Kang
  • Publication number: 20170200480
    Abstract: Provided herein are a voltage regulator, a memory system having the same and an operation method thereof. The memory system includes a memory device configured to store data, a controller configured to control the memory device, and a voltage regulator configured to supply a pump-out voltage to the memory device or the controller so that the memory device or the controller is operated in the following manner: until a level of the pump-out voltage is increased to a second reference voltage lower than a first reference voltage, the pump-out voltage is output using a clock having a first frequency; when the pump-out voltage exceeds the second reference voltage and does not exceed the first reference voltage, the pump-out voltage is output using a clock having a second frequency lower than the first frequency; and when the pump-out voltage exceeds the first reference voltage, the pump-out voltage is output using the clock having the first frequency.
    Type: Application
    Filed: March 29, 2017
    Publication date: July 13, 2017
    Applicant: SK hynix Inc.
    Inventors: Ki Soo KIM, Jin Seong KANG
  • Patent number: 9647538
    Abstract: Provided herein are a voltage regulator, a memory system having the same and an operation method thereof. The memory system includes a memory device configured to store data, a controller configured to control the memory device, and a voltage regulator configured to supply a pump-out voltage to the memory device or the controller so that the memory device or the controller is operated in the following manner: until a level of the pump-out voltage is increased to a second reference voltage lower than a first reference voltage, the pump-out voltage is output using a clock having a first frequency; when the pump-out voltage exceeds the second reference voltage and does not exceed the first reference voltage, the pump-out voltage is output using a clock having a second frequency lower than the first frequency; and when the pump-out voltage exceeds the first reference voltage, the pump-out voltage is output using the clock having the first frequency.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: May 9, 2017
    Assignee: SK Hynix Inc.
    Inventors: Ki Soo Kim, Jin Seong Kang
  • Publication number: 20170085171
    Abstract: Provided herein are a voltage regulator, a memory system having the same and an operation method thereof. The memory system includes a memory device configured to store data, a controller configured to control the memory device, and a voltage regulator configured to supply a pump-out voltage to the memory device or the controller so that the memory device or the controller is operated in the following manner: until a level of the pump-out voltage is increased to a second reference voltage lower than a first reference voltage, the pump-out voltage is output using a clock having a first frequency; when the pump-out voltage exceeds the second reference voltage and does not exceed the first reference voltage, the pump-out voltage is output using a clock having a second frequency lower than the first frequency; and when the pump-out voltage exceeds the first reference voltage, the pump-out voltage is output using the clock having the first frequency.
    Type: Application
    Filed: February 22, 2016
    Publication date: March 23, 2017
    Inventors: Ki Soo KIM, Jin Seong KANG
  • Publication number: 20160170432
    Abstract: A reference voltage generator includes a mirroring circuit generating a first sub-voltage and a second sub-voltage that are constant, a first voltage generator including a first switch generating a first voltage based on the first sub-voltage, and a second voltage generator including a second switch generating a second voltage that is lower than the first voltage based on the second sub-voltage, wherein the second switch has a threshold voltage that is lower than the first switch to keep a voltage difference between the first voltage and the second voltage as a first reference voltage.
    Type: Application
    Filed: May 1, 2015
    Publication date: June 16, 2016
    Inventor: Jin Seong KANG