Abstract: A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a first surface on which to mount the non-standard device, a pin matching circuit, and a second surface constructed and arranged to couple the pin matching circuit to a standard pin configuration. The interface board can be mounted directly on the test substrate, or coupled to the test substrate through various arrangements of sockets, connection boards, and supports.

Abstract: A method and apparatus for testing memory devices under actual operating conditions can accommodate non-standard memory devices through the use of an interface board that adapts a non-standard pin configuration to a standard pin configuration on a test substrate. The interface board can include a first surface on which to mount the non-standard device, a pin matching circuit, and a second surface constructed and arranged to couple the pin matching circuit to a standard pin configuration. The interface board can be mounted directly on the test substrate, or coupled to the test substrate through various arrangements of sockets, connection boards, and supports.