Patents by Inventor Jin Seop Shim

Jin Seop Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9431389
    Abstract: An ESD transistor and an ESD protection circuit thereof are provided. An ESD transistor includes a collector region disposed on a surface of a substrate, a sink region disposed vertically below the collector region, and a buried layer protruding horizontally further than the sink region under the sink region.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: August 30, 2016
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Kyong Jin Hwang, Jin Seop Shim, Jae Hyun Lee
  • Publication number: 20140367783
    Abstract: An ESD transistor and an ESD protection circuit thereof are provided. An ESD transistor includes a collector region disposed on a surface of a substrate, a sink region disposed vertically below the collector region, and a burier layer protruding horizontally further than the sink region under the sink region.
    Type: Application
    Filed: February 24, 2014
    Publication date: December 18, 2014
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Kyong Jin HWANG, Jin Seop SHIM, Jae Hyun LEE
  • Patent number: 6767312
    Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: July 27, 2004
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jin-Seop Shim
  • Patent number: 6627929
    Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: September 30, 2003
    Assignee: LG Semicon Co., Ltd.
    Inventors: Jin Seop Shim, Seo Kyu Lee
  • Publication number: 20030173603
    Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 18, 2003
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Jin-Seop Shim
  • Patent number: 6570201
    Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: May 27, 2003
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jin-Seop Shim
  • Publication number: 20020175355
    Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.
    Type: Application
    Filed: October 11, 2001
    Publication date: November 28, 2002
    Inventor: Jin-Seop Shim
  • Publication number: 20010028073
    Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.
    Type: Application
    Filed: June 13, 2001
    Publication date: October 11, 2001
    Applicant: LG Semicon Co., Ltd.
    Inventors: Jin Seop Shim, Seo Kyu Lee
  • Patent number: 6300157
    Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: October 9, 2001
    Assignee: LG Semicon Co., Ltd.
    Inventors: Jin Seop Shim, Seo Kyu Lee
  • Patent number: 6093582
    Abstract: A charge coupled device and a method of manufacturing a charged coupled device includes a semiconductor substrate, a plurality of photoelectrical conversion cells formed in the semiconductor substrate in a matrix form, a plurality of vertical charge coupled device regions formed between the plurality of photoelectrical conversion cells, a plurality of stripe layers formed on the semiconductor substrate and corresponding to the plurality of vertical charge coupled device regions, and a plurality of microlenses formed on the semiconductor substrate and corresponding to the plurality of photoelectrical conversion cells.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: July 25, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventor: Jin Seop Shim
  • Patent number: 5959318
    Abstract: A solid state image pickup device includes a semiconductor substrate, a CCD channel region in the semiconductor substrate, a plurality of polygates over the CCD channel regions, and a photoelectric conversion region having a portion above an uppermost surface of the semiconductor substrate.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: September 28, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventors: Jin Seop Shim, Chul Ho Park
  • Patent number: 5900655
    Abstract: A charge coupled device and a method of manufacturing a charged coupled device includes a semiconductor substrate, a plurality of photoelectrical conversion cells formed in the semiconductor substrate in a matrix form, a plurality of vertical charge coupled device regions formed between the plurality of photoelectrical conversion cells, a plurality of stripe layers formed on the semiconductor substrate and corresponding to the plurality of vertical charge coupled device regions, and a plurality of microlenses formed on the semiconductor substrate and corresponding to the plurality of photoelectrical conversion cells.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: May 4, 1999
    Assignee: LG Semicon Co, Ltd.
    Inventor: Jin Seop Shim
  • Patent number: 5895943
    Abstract: A color charge-coupled device is disclosed including plural light detectors corresponding to first to third colors and plural charge transmission regions on a semiconductor substrate; a pad on one side of the substrate excluding a portion where the light detectors and charge transmission regions are formed; a planarizing film on the substrate excluding the pad; microlenses on the planarizing film above the light detectors; and first to third color filter layers on each microlens excluding the edge portion.
    Type: Grant
    Filed: July 30, 1997
    Date of Patent: April 20, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventors: Chul Ho Park, Jin Seop Shim, Kwang Bok Song
  • Patent number: 5677200
    Abstract: A method of manufacturing a color charge-coupled device is disclosed including the steps of alternately forming a plurality of light detectors corresponding to first to third colors and a plurality of charge transmission regions on a semiconductor substrate; forming a pad on one side of the substrate excluding a portion where the light detectors and charge transmission regions are formed; forming a planarizing film on the substrate excluding the pad; coating a microlens material on the planarizing film and patterning the microlens material so as to be left only on the planarizing film above the light detectors; thermally flowing the microlens material, to thereby form microlenses on the planarizing film above the light detectors; and hard-baking first to third dyeing layer, to thereby form first to third color filter layers on each microlens excluding the edge portion.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: October 14, 1997
    Assignee: LG Semicond Co., Ltd.
    Inventors: Chul Ho Park, Jin Seop Shim, Kwang Bok Song