Patents by Inventor Jin Seop Shim
Jin Seop Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9431389Abstract: An ESD transistor and an ESD protection circuit thereof are provided. An ESD transistor includes a collector region disposed on a surface of a substrate, a sink region disposed vertically below the collector region, and a buried layer protruding horizontally further than the sink region under the sink region.Type: GrantFiled: February 24, 2014Date of Patent: August 30, 2016Assignee: MagnaChip Semiconductor, Ltd.Inventors: Kyong Jin Hwang, Jin Seop Shim, Jae Hyun Lee
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Publication number: 20140367783Abstract: An ESD transistor and an ESD protection circuit thereof are provided. An ESD transistor includes a collector region disposed on a surface of a substrate, a sink region disposed vertically below the collector region, and a burier layer protruding horizontally further than the sink region under the sink region.Type: ApplicationFiled: February 24, 2014Publication date: December 18, 2014Applicant: MagnaChip Semiconductor, Ltd.Inventors: Kyong Jin HWANG, Jin Seop SHIM, Jae Hyun LEE
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Patent number: 6767312Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.Type: GrantFiled: March 20, 2003Date of Patent: July 27, 2004Assignee: Hynix Semiconductor Inc.Inventor: Jin-Seop Shim
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Patent number: 6627929Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.Type: GrantFiled: June 13, 2001Date of Patent: September 30, 2003Assignee: LG Semicon Co., Ltd.Inventors: Jin Seop Shim, Seo Kyu Lee
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Publication number: 20030173603Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.Type: ApplicationFiled: March 20, 2003Publication date: September 18, 2003Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Jin-Seop Shim
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Patent number: 6570201Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.Type: GrantFiled: October 11, 2001Date of Patent: May 27, 2003Assignee: Hynix Semiconductor Inc.Inventor: Jin-Seop Shim
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Publication number: 20020175355Abstract: A CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same. The punch-through voltage of a transfer transistor is increased, and the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, while the photodiode is formed without resorting to a self-aligned ion-implantation. A p-type impurity region is formed under the gate electrode of the transfer transistor and within the semiconductor substrate, and the process can proceed without being limited by the self-alignment. Further, the p-type impurity region heightens the potential barrier between the photodiode and the floating diffusion region, i.e., the potential difference between the two regions is increased and, therefore, the charge accumulation amount is increased in the photodiode.Type: ApplicationFiled: October 11, 2001Publication date: November 28, 2002Inventor: Jin-Seop Shim
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Publication number: 20010028073Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.Type: ApplicationFiled: June 13, 2001Publication date: October 11, 2001Applicant: LG Semicon Co., Ltd.Inventors: Jin Seop Shim, Seo Kyu Lee
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Patent number: 6300157Abstract: Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.Type: GrantFiled: October 13, 1998Date of Patent: October 9, 2001Assignee: LG Semicon Co., Ltd.Inventors: Jin Seop Shim, Seo Kyu Lee
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Patent number: 6093582Abstract: A charge coupled device and a method of manufacturing a charged coupled device includes a semiconductor substrate, a plurality of photoelectrical conversion cells formed in the semiconductor substrate in a matrix form, a plurality of vertical charge coupled device regions formed between the plurality of photoelectrical conversion cells, a plurality of stripe layers formed on the semiconductor substrate and corresponding to the plurality of vertical charge coupled device regions, and a plurality of microlenses formed on the semiconductor substrate and corresponding to the plurality of photoelectrical conversion cells.Type: GrantFiled: December 16, 1998Date of Patent: July 25, 2000Assignee: LG Semicon Co., Ltd.Inventor: Jin Seop Shim
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Patent number: 5959318Abstract: A solid state image pickup device includes a semiconductor substrate, a CCD channel region in the semiconductor substrate, a plurality of polygates over the CCD channel regions, and a photoelectric conversion region having a portion above an uppermost surface of the semiconductor substrate.Type: GrantFiled: May 14, 1997Date of Patent: September 28, 1999Assignee: LG Semicon Co., Ltd.Inventors: Jin Seop Shim, Chul Ho Park
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Patent number: 5900655Abstract: A charge coupled device and a method of manufacturing a charged coupled device includes a semiconductor substrate, a plurality of photoelectrical conversion cells formed in the semiconductor substrate in a matrix form, a plurality of vertical charge coupled device regions formed between the plurality of photoelectrical conversion cells, a plurality of stripe layers formed on the semiconductor substrate and corresponding to the plurality of vertical charge coupled device regions, and a plurality of microlenses formed on the semiconductor substrate and corresponding to the plurality of photoelectrical conversion cells.Type: GrantFiled: April 28, 1997Date of Patent: May 4, 1999Assignee: LG Semicon Co, Ltd.Inventor: Jin Seop Shim
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Patent number: 5895943Abstract: A color charge-coupled device is disclosed including plural light detectors corresponding to first to third colors and plural charge transmission regions on a semiconductor substrate; a pad on one side of the substrate excluding a portion where the light detectors and charge transmission regions are formed; a planarizing film on the substrate excluding the pad; microlenses on the planarizing film above the light detectors; and first to third color filter layers on each microlens excluding the edge portion.Type: GrantFiled: July 30, 1997Date of Patent: April 20, 1999Assignee: LG Semicon Co., Ltd.Inventors: Chul Ho Park, Jin Seop Shim, Kwang Bok Song
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Patent number: 5677200Abstract: A method of manufacturing a color charge-coupled device is disclosed including the steps of alternately forming a plurality of light detectors corresponding to first to third colors and a plurality of charge transmission regions on a semiconductor substrate; forming a pad on one side of the substrate excluding a portion where the light detectors and charge transmission regions are formed; forming a planarizing film on the substrate excluding the pad; coating a microlens material on the planarizing film and patterning the microlens material so as to be left only on the planarizing film above the light detectors; thermally flowing the microlens material, to thereby form microlenses on the planarizing film above the light detectors; and hard-baking first to third dyeing layer, to thereby form first to third color filter layers on each microlens excluding the edge portion.Type: GrantFiled: May 17, 1995Date of Patent: October 14, 1997Assignee: LG Semicond Co., Ltd.Inventors: Chul Ho Park, Jin Seop Shim, Kwang Bok Song