Patents by Inventor Jin-Shi Zhao
Jin-Shi Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9159914Abstract: A nonvolatile memory device includes a bottom electrode on a semiconductor substrate, a data storage layer on the bottom electrode, the data storage layer including a transition metal oxide, and a switching layer provided on a top surface and/or a bottom surface of the data storage layer, wherein a bond energy of material included in the switching layer and oxygen is more than a bond energy of a transition metal in the transition metal oxide and oxygen.Type: GrantFiled: December 20, 2013Date of Patent: October 13, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Eun-Kyung Yim, In-Gyu Baek, Jang-Eun Lee, Se-Chung Oh, Kyung-Tae Nam, Jin-Shi Zhao
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Publication number: 20140124727Abstract: A nonvolatile memory device includes a bottom electrode on a semiconductor substrate, a data storage layer on the bottom electrode, the data storage layer including a transition metal oxide, and a switching layer provided on a top surface and/or a bottom surface of the data storage layer, wherein a bond energy of material included in the switching layer and oxygen is more than a bond energy of a transition metal in the transition metal oxide and oxygen.Type: ApplicationFiled: December 20, 2013Publication date: May 8, 2014Inventors: Eun-Kyung Yim, In-Gyu Baek, Jang-Eun Lee, Se-Chung Oh, Kyung-Tae Nam, Jin-Shi Zhao
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Patent number: 8698281Abstract: A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially perpendicular to a face of a substrate, a plurality of first external electrodes that extend substantially in parallel with the face of the substrate, and a plurality of second external electrodes that also extend substantially in parallel with the face of the substrate. Each first external electrode is on a first side of a respective one of the internal electrodes, and each second external electrode is on a second side of a respective one of the internal electrodes. These devices also include a plurality of variable resistors that contact the internal electrodes, the first external electrodes and the second external electrodes.Type: GrantFiled: October 19, 2012Date of Patent: April 15, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao, Eun-Kyung Yim
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Patent number: 8614125Abstract: A nonvolatile memory device includes a bottom electrode on a semiconductor substrate, a data storage layer on the bottom electrode, the data storage layer including a transition metal oxide, and a switching layer provided on a top surface and/or a bottom surface of the data storage layer, wherein a bond energy of material included in the switching layer and oxygen is more than a bond energy of a transition metal in the transition metal oxide and oxygen.Type: GrantFiled: February 15, 2008Date of Patent: December 24, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Eun-Kyung Yim, In-Gyu Baek, Jang-Eun Lee, Se-Chung Oh, Kyung-Tae Nam, Jin-Shi Zhao
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Patent number: 8451645Abstract: A variable resistance memory device includes a variable resistance memory cell, and a by-pass circuit configured to electrically by-pass a programming pulse supplied to the variable resistance memory cell after a resistive state of the variable resistance memory cell has changed in response to the programming pulse.Type: GrantFiled: August 6, 2010Date of Patent: May 28, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hong-Sik Yoon, Min-Young Park, In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao
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Patent number: 8358527Abstract: Multi-level nonvolatile memory devices using variable resistive elements, the multi-level nonvolatile memory devices including a word line, a bit line, and a multi-level memory cell coupled between the word line and the bit line, the multi-level memory cell having first resistance level and a second resistance level higher than the first resistance level when the first and second write biases having the same polarity are applied thereto, and a third resistance level and a fourth resistance level ranging between the first and second resistance levels, when third and fourth write biases having different polarities from each other are applied thereto.Type: GrantFiled: February 16, 2010Date of Patent: January 22, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: In-Gyu Baek, Hyun-Jun Sim, Hong-Sik Yoon, Jin-Shi Zhao, Min-Young Park
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Patent number: 8338224Abstract: Provided is a resistance random access memory device and a method of fabricating, the same. The method includes forming a bit-line stack in which a plurality of local bit-lines are vertically stacked on a substrate, forming a word-line including a plurality of local word-lines that extend in a vertical direction toward a side of the bit-line stack and a connection line that extends in a horizontal direction to connect the plurality of local word-lines with one another, and forming a resistance memory thin film between the bit-line stack and the word-line. The present inventive concept can realize a highly dense memory array with 3D cross-point architecture by simplified processes.Type: GrantFiled: November 18, 2009Date of Patent: December 25, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: HongSik Yoon, Ingyu Baek, Hyunjun Sim, Jin-Shi Zhao, Minyoung Park
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Patent number: 8314003Abstract: A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially perpendicular to a face of a substrate, a plurality of first external electrodes that extend substantially in parallel with the face of the substrate, and a plurality of second external electrodes that also extend substantially in parallel with the face of the substrate. Each first external electrode is on a first side of a respective one of the internal electrodes, and each second external electrode is on a second side of a respective one of the internal electrodes. These devices also include a plurality of variable resistors that contact the internal electrodes, the first external electrodes and the second external electrodes.Type: GrantFiled: May 5, 2011Date of Patent: November 20, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao, Eun-Kyung Yim
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Publication number: 20110204315Abstract: A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially perpendicular to a face of a substrate, a plurality of first external electrodes that extend substantially in parallel with the face of the substrate, and a plurality of second external electrodes that also extend substantially in parallel with the face of the substrate. Each first external electrode is on a first side of a respective one of the internal electrodes, and each second external electrode is on a second side of a respective one of the internal electrodes. These devices also include a plurality of variable resistors that contact the internal electrodes, the first external electrodes and the second external electrodes.Type: ApplicationFiled: May 5, 2011Publication date: August 25, 2011Inventors: In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao, Eun-Kyung Yim
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Patent number: 7952163Abstract: A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially perpendicular to a face of a substrate, a plurality of first external electrodes that extend substantially in parallel with the face of the substrate, and a plurality of second external electrodes that also extend substantially in parallel with the face of the substrate. Each first external electrode is on a first side of a respective one of the internal electrodes, and each second external electrode is on a second side of a respective one of the internal electrodes. These devices also include a plurality of variable resistors that contact the internal electrodes, the first external electrodes and the second external electrodes.Type: GrantFiled: January 14, 2009Date of Patent: May 31, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao, Eun-Kyung Yim
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Publication number: 20110032747Abstract: A variable resistance memory device includes a variable resistance memory cell, and a by-pass circuit configured to electrically by-pass a programming pulse supplied to the variable resistance memory cell after a resistive state of the variable resistance memory cell has changed in response to the programming pulse.Type: ApplicationFiled: August 6, 2010Publication date: February 10, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hong-Sik Yoon, Min-Young Park, In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao
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Patent number: 7838863Abstract: Provided is a semiconductor device including a resistive memory element. The semiconductor device includes a substrate and the resistive memory element disposed on the substrate. The resistive memory element has resistance states of a plurality of levels according to generation and dissipation of at least one platinum bridge therein.Type: GrantFiled: February 19, 2009Date of Patent: November 23, 2010Assignee: Samsung Electronics Co. Ltd.Inventors: Jin-Shi Zhao, Jang-Eun Lee, In-Gyu Baek, Hyun-Jun Sim, Xiang-Shu Li, Eun-Kyung Yim
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Publication number: 20100208508Abstract: Multi-level nonvolatile memory devices using variable resistive elements, the multi-level nonvolatile memory devices including a word line, a bit line, and a multi-level memory cell coupled between the word line and the bit line, the multi-level memory cell having first resistance level and a second resistance level higher than the first resistance level when the first and second write biases having the same polarity are applied thereto, and a third resistance level and a fourth resistance level ranging between the first and second resistance levels, when third and fourth write biases having different polarities from each other are applied thereto.Type: ApplicationFiled: February 16, 2010Publication date: August 19, 2010Inventors: In-Gyu Baek, Hyun-Jun Sim, Hong-Sik Yoon, Jin-Shi Zhao, Min-Young Park
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Publication number: 20100178729Abstract: Provided is a resistance random access memory device and a method of fabricating, the same. The method includes forming a bit-line stack in which a plurality of local bit-lines are vertically stacked on a substrate, forming a word-line including a plurality of local word-lines that extend in a vertical direction toward a side of the bit-line stack and a connection line that extends in a horizontal direction to connect the plurality of local word-lines with one another, and forming a resistance memory thin film between the bit-line stack and the word-line. The present inventive concept can realize a highly dense memory array with 3D cross-point architecture by simplified processes.Type: ApplicationFiled: November 18, 2009Publication date: July 15, 2010Inventors: HongSik Yoon, Ingyu Baek, Hyunjun Sim, Jin-Shi Zhao, Minyoung Park
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Publication number: 20090275169Abstract: A semiconductor device which includes a reaction prevention layer between a resistive memory element and an insulating layer and a method of forming the same.Type: ApplicationFiled: April 6, 2009Publication date: November 5, 2009Inventors: Hyun-Jun Sim, Sok-Hun Choi, In-Gyu Baek, Jin-Shi Zhao, Eun-Kyung Yim
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Publication number: 20090230512Abstract: A nonvolatile memory device, a method of fabricating the nonvolatile memory device and a processing system including the nonvolatile memory device. The nonvolatile memory device may include a plurality of internal electrodes that extend in a direction substantially perpendicular to a face of a substrate, a plurality of first external electrodes that extend substantially in parallel with the face of the substrate, and a plurality of second external electrodes that also extend substantially in parallel with the face of the substrate. Each first external electrode is on a first side of a respective one of the internal electrodes, and each second external electrode is on a second side of a respective one of the internal electrodes. These devices also include a plurality of variable resistors that contact the internal electrodes, the first external electrodes and the second external electrodes.Type: ApplicationFiled: January 14, 2009Publication date: September 17, 2009Inventors: In-Gyu Baek, Hyun-Jun Sim, Jin-Shi Zhao, Eun-Kyung Yim
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Publication number: 20090212273Abstract: Provided is a semiconductor device including a resistive memory element. The semiconductor device includes a substrate and the resistive memory element disposed on the substrate. The resistive memory element has resistance states of a plurality of levels according to generation and dissipation of at least one platinum bridge therein.Type: ApplicationFiled: February 19, 2009Publication date: August 27, 2009Inventors: Jin-Shi Zhao, Jang-Eun Lee, In-Gyu Baek, Hyun-Jun Sim, Xiang-Shu Li, Eun-Kyung Yim
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Publication number: 20080211036Abstract: A nonvolatile memory device includes a semiconductor substrate, a first electrode on the semiconductor substrate, a resistive layer on the first electrode, a second electrode on the resistive layer and at least one tunneling layer interposed between the resistive layer and the first electrode and/or the second electrode. The resistive layer and the tunneling layer may support transition between first and second resistance states responsive to first and second voltages applied across the first and second electrodes. The first and second voltages may have opposite polarities.Type: ApplicationFiled: February 26, 2008Publication date: September 4, 2008Inventors: Jin Shi Zhao, Jang-eun Lee, In-gyu Baek, Se-chung Oh, Kyung-tae Nam, Eun-kyung Yim
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Publication number: 20080197336Abstract: A nonvolatile memory device includes a bottom electrode on a semiconductor substrate, a data storage layer on the bottom electrode, the data storage layer including a transition metal oxide, and a switching layer provided on a top surface and/or a bottom surface of the data storage layer, wherein a bond energy of material included in the switching layer and oxygen is more than a bond energy of a transition metal in the transition metal oxide and oxygen.Type: ApplicationFiled: February 15, 2008Publication date: August 21, 2008Applicant: Samsung Electronics Co., LTD.Inventors: Eun-Kyung Yim, In-Gyu Baek, Jang-Eun Lee, Se-Chung Oh, Kyung-Tae Nam, Jin-Shi Zhao