Patents by Inventor Jin-shown Shie

Jin-shown Shie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230273123
    Abstract: A structure of thermal stress release of photo-excited thermal infrared emitter includes a substrate, a VCSEL unit, a frame, and a layered structure. The VCSEL unit has a small emission angle disposed on a portion of the substrate. The frame is disposed on the substrate, and has an interior side wall inclinedly extended upwardly to form a cavity in which the portion of the substrate is to be exposed. The layered structure is above the VCSEL unit and includes a first light-transparent passivation layer, a light absorbing and thermal infrared emitting layer, and a second light-transparent passivation layer formed in sequence for chemical protection. The light absorbing and thermal infrared emitting absorbs light emitted from the VCSEL unit to generate infrared radiation, and has a layout geometry of reticulated mosaic size such that thermal expansion mismatch and induced stress are minimized without accumulation due to small reticulated mosaic size.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventor: Jin-Shown SHIE
  • Publication number: 20220221635
    Abstract: An infrared (IR) filter includes a silicon substrate and a metallic reticulated structure that is disposed on the silicon substrate and that is formed with a plurality of holes for transmitting IR light. Also disclosed is a thermal IR sensing device including the IR filter. The thermal IR sensing device includes a housing defining a vacuum chamber, a thermal IR image detector disposed within the vacuum chamber, and the IR filter coupled to the housing in position away from the thermal IR image detector with the metallic reticulated structure facing the thermal IR image detector. The IR filter allows an incident IR light to transmit therethrough so as to be detected by the thermal IR image detector.
    Type: Application
    Filed: January 4, 2022
    Publication date: July 14, 2022
    Inventor: Jin-Shown SHIE
  • Patent number: 11004997
    Abstract: An infrared thermal emitter includes a substrate, a light-emitting unit and an infrared-emitting unit. The light-emitting unit is disposed on the substrate in a laminating direction and has a light-exiting surface away from the substrate. The infrared-emitting unit is disposed on the substrate in the laminating direction to cover the light-emitting unit and includes a layered structure having a light-absorbing layer that is aligned with the light-emitting unit in the laminating direction. The light-absorbing layer absorbs light emitted from the light-emitting unit so as to be heated up and to generate infrared radiation.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: May 11, 2021
    Assignees: GODSMITH SENSOR INC., OPTO TECH CORPORATION
    Inventors: Jin-Shown Shie, Yi-Chun Liao, Chieh-Yi Chen, Chung-Cheng Lin, Cheng-Wei Yang, Chi-Tseng Chang
  • Publication number: 20200083394
    Abstract: An infrared thermal emitter includes a substrate, a light-emitting unit and an infrared-emitting unit. The light-emitting unit is disposed on the substrate in a laminating direction and has a light-exiting surface away from the substrate. The infrared-emitting unit is disposed on the substrate in the laminating direction to cover the light-emitting unit and includes a layered structure having a light-absorbing layer that is aligned with the light-emitting unit in the laminating direction. The light-absorbing layer absorbs light emitted from the light-emitting unit so as to be heated up and to generate infrared radiation.
    Type: Application
    Filed: August 13, 2019
    Publication date: March 12, 2020
    Applicants: Godsmith Sensor Inc., Opto Tech Corporation
    Inventors: Jin-Shown SHIE, Yi-Chun LIAO, Chieh-Yi CHEN, Chung-Cheng LIN, Cheng-Wei YANG, Chi-Tseng CHANG
  • Patent number: 9129143
    Abstract: A finger sensing structure for a capacitive fingerprint recognition IC is provided here. The structure comprises a finger sensing metal layer with fish bone shape. When fingers approach or touch the surface of the capacitive fingerprint recognition IC, capacitive sense is induced between the fingers and the metal patterned layer to wake up the IC. Before the fingers approach or touch the IC, the IC is hibernated; once the fingers are detected, the IC is woken up. The metal patterned layer can reduce energy consumption of the IC especially for portable fingerprint recognition IC.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: September 8, 2015
    Assignee: IMAGE MATCH DESIGN INC.
    Inventors: Jin-Shown Shie, Ting-Sing Wang
  • Publication number: 20140369574
    Abstract: A finger sensing structure for a capacitive fingerprint recognition IC is provided here. The structure comprises a finger sensing metal layer with fish bone shape. When fingers approach or touch the surface of the capacitive fingerprint recognition IC, capacitive sense is induced between the fingers and the metal patterned layer to wake up the IC. Before the fingers approach or touch the IC, the IC is hibernated; once the fingers are detected, the IC is woken up. The metal patterned layer can reduce energy consumption of the IC especially for portable fingerprint recognition IC.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 18, 2014
    Inventors: Jin-Shown SHIE, Ting-Sing WANG
  • Publication number: 20140209800
    Abstract: An NDIR gas detector includes a photodetector for detecting a portion of stray visible light emitted from an incandescent lamp so as to generate an induced electrical signal, which is compared with a preset reference signal associated with a predetermined constant level of the stray visible light corresponding to a constant temperature of the lamp so as to obtain a level difference between the induced electrical signal and the reference signal. Electrical power supplied to the lamp is repeatedly regulated based on the level difference until the induced electrical signal and the reference signal have the same level, thereby stabilizing IR emission of the lamp in response to the lamp being kept at the constant temperature.
    Type: Application
    Filed: March 14, 2013
    Publication date: July 31, 2014
    Applicant: ORIENTAL SYSTEM TECHNOLOGY INC.
    Inventors: Jin-Shown SHIE, Chien-Hsun WANG
  • Patent number: 8575578
    Abstract: A chip-scale infrared emitter package comprises an emitter chip and an enclosure. The emitter chip includes: a base having a central cavity; a membrane having a peripheral end, the peripheral end being isolated from a periphery of the central cavity by a loop-shaped gap; an electric resistor formed on the membrane; at least one slim supporting beam extending from the peripheral end of the membrane through the loop-shaped gap to the base; and a reflective material coated on the membrane. The enclosure has a can housing and a transparent window plate. The window plate cooperates with the can housing to define an enclosed vacuum chamber. The emitter chip is mounted in the enclosed vacuum chamber. The enclosed vacuum chamber has a pressure less than 0.01 torr.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: November 5, 2013
    Assignee: Oriental System Technology, Inc.
    Inventors: Jin-Shown Shie, Chen-Tang Huang, Chung-Nan Chen
  • Patent number: 7333684
    Abstract: This invention relates to a novel stack-integration package of a light emitter and a photodetector in a high speed, full duplex optical transceiver for fiber communications. The structure is comprised of a photodetector chip, having an isolated micromachined cavity on the chip surface, and a light emitter chip, stacked on the bottom surface inside that cavity, so that a stack-integrated embodiment of light detector and emitter capable of performing full duplex optical communication is resulted. Said cavity surface in the photodetector is coated with reflective metal to prevent direct optical crosstalk from the emitter to the photodetector. Said light emitter means either LED (light emitting diode) or LD (laser diode). The present invention is further characterized by having a transparent encapsulation over the stack-integrated embodiment with a specific surface contour that minimizes the Fresnel reflection at the encapsulation-air interface and its associated crosstalk aftereffect.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: February 19, 2008
    Assignee: Integrated Crystal Technology Incorporated
    Inventors: Jin Shown Shie, Rongnan Huang
  • Publication number: 20070267719
    Abstract: The present invention provides a structure and the manufacturing method of high precision chip capacitor fabricated on silicon substrate. The structure of the chip capacitor consists of a dielectric layer formed on the surface of a heavily doped silicon substrate with an inner primary portion of thin oxide and an outer secondary portion of thicker oxide; both oxides are merged seamlessly together into the single dielectric layer thus allowing a layer of electrically conducting film deposited on its surface as the first electrode of the capacitor, while the heavily doped silicon substrate on the opposite surface of the dielectric oxide plays as the bottom electrode. The bottom electrode is electrically connected up to a second electrode on the upper surface through a via so that both the first and second electrodes can be on the same surface for subsequent bumping process, finally, two solder bumps is formed on the top as a surface mountable chip capacitor component.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 22, 2007
    Inventor: Jin Shown Shie
  • Publication number: 20070228386
    Abstract: A wire-bonding free packaging structure for light emitting diode (LED) is provided. Prepare a silicon sub-mount having a backside bulk micromachining reach-through U-shape cavity for accommodating a flip-chip LED. This stack-integrated packaging module with solder bumps on the surface is than bonded to an aluminum PC board with flip-chip surface mount packaging or bump technology. This gives very good heat conduction to the heat sink of the PC board and can endure more current to enhance light intensity of the LED. This stack-integrated packaging module can also be bonded on a lead frame with two leg packaging, which can also increase heat conduction.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 4, 2007
    Inventors: Jin-Shown Shie, C.Y. Hsieh, Chien Lin
  • Patent number: 7247542
    Abstract: The present invention discloses a fabrication method and structure of spiral RF inductor on porous glass substrate. Thick porous silicon layer is natively formed on a silicon wafer by anodic etching the silicon material to a high degree of porosity. The porous silicon is than thermally oxidized at high temperature converting it into porous glass texture. The oxidation rate can be rapid due to open pore character of the etched structure, which allows oxidizing agents to penetrate deeply into the wafer. If the porosity is large enough, the pores will not be sealed by the expansion of oxide during the oxidation, which results a porous structure of glass-and-air mixture of low relative dielectric constant slightly over a value of 2. The final holes appear on the wafer surface can be sealed by CVD coating step, if necessary. This ultra-flat, low-k, silicon-based substrate allows RF spiral inductor to be made on its surface with excellently low loss, or high Q value.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: July 24, 2007
    Assignee: Integrated Crystal Technology, Inc.
    Inventor: Jin Shown Shie
  • Publication number: 20030068838
    Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.
    Type: Application
    Filed: October 9, 2001
    Publication date: April 10, 2003
    Inventors: Jin-shown Shie, Ji-cheng Lin, Chune-te Lin, Chih-tang Peng, Shih-han Yu, Kuo-ning Chiang
  • Patent number: 6541834
    Abstract: The invention is a silicon pressure micro-sensing device and the fabrication process thereof. The silicon pressure micro-sensing device includes a pressure chamber, and is constituted of a P-type substrate with a taper chamber and an N-type epitaxial layer thereon. On the N-type epitaxial layer are a plurality of piezo-resistance sensing units which sense deformation caused by pressure. The fabrication pressure of the silicon pressure micro-sensing device includes a step of first making a plurality of holes on the N-type epitaxial layer to reach the P-type substrate beneath. Then, by an anisotropic etching stop technique, in which etchant pass through the holes, a taper chamber is formed in the P-type substrate. Finally, an insulating material is applied to seal the holes, thus attaining the silicon pressure micro-sensing device that is able to sense pressure differences between two ends thereof.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: April 1, 2003
    Assignee: Integrated Crystal Technology Corp.
    Inventors: Jin-shown Shie, Ji-cheng Lin, Chun-te Lin, Chih-tang Peng, Shih-han Yu, Kuo-ning Chiang
  • Patent number: 6480389
    Abstract: A light emitting diode (LED) includes a heat dissipation structure characterized by having a heat dissipating fluidic coolant filled in a hermetically sealed housing where at least one LED chip mounted on a metallic substrate is dwelled inside. The heat dissipation structure is configured with a metallic wall erected from the metallic substrate, which is used to hold a transparent cap of the sealed housing in correct position. Furthermore, the erected wall surrounds in proximity with the at least one LED chip, so that the joule heat generated therefrom can be quickly spread out, through the heat dissipating fluidic coolant, to the erected wall, and then diffused along the wall down to the metallic substrate which adjoins with a larger external heat sink for draining the heat, thus preventing the at least one LED from overheating.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: November 12, 2002
    Assignee: Opto Tech Corporation
    Inventors: Jin-shown Shie, Chih-yuan Yen, Chien-chen Hung, Mei-hsueh Peng
  • Publication number: 20020153529
    Abstract: A Light Emitting Diode array (LED) with an optical isolation structure and a method of manufacturing the same. The LED array with an optical isolation structure includes a substrate, a plurality of LED units and a plurality of trenches. The plural LED units and trenches are disposed on the surface of the substrate. Each trench is disposed between every two LED units and deposited with at least one reflective metal layer. The substrate of the LED array with an optical isolation structure is formed of a low-energy-gap semiconductor material, while the LED units are formed by another kind of semiconductor material whose energy gap is higher than the substrate. The light emitted from each LED unit is reflected by the plural trenches deposited with at least one reflective metal layer, and absorbed by the substrate with low-energy gap.
    Type: Application
    Filed: April 24, 2001
    Publication date: October 24, 2002
    Inventor: Jin-Shown Shie
  • Patent number: 6055107
    Abstract: Method for the preparation of diffractive lens with one single etching step and using one single etching mask. While the widths and intervals of the masked areas of the photo masks are decided under a geometric relation, an etching mask can be prepared on the substrate of the lens where the widths and the intervals of the masked areas can be determined. As the included angle between the etching mask and the plan of the material of the lens is in a certain ratio to the etching efficiency of the etchant to the substrate of the lens, a one step etching process can be developed whereby multilevel diffractive lens with required number, widths and heights of the levels can be obtained. This invention also provides an oxidation-isotropic etching process on the diffractive lens so prepared.
    Type: Grant
    Filed: August 12, 1997
    Date of Patent: April 25, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Yeh-Tseng Li, Chen-Kuei Chung, Jin-Shown Shie
  • Patent number: 6013935
    Abstract: This invention relates to a high-transimpedance solid-state switch manufactured by micromachining technology. A thermopile is formed by a thin-film structure capable of producing sufficient thermoelectrical voltage to drive a MOS transistor on and off, functioning like a switch. The driving thermoelectric voltage is generated by Joule's heat released by a thin-film heater disposed nearby a thermopile hot junction to generate a substantial temperature difference related to its cold junction. These elements can be monolithically integrated, wherein the heater and hot junctions are disposed on a thermal pad formed by micromachining having high thermal isolation.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: January 11, 2000
    Inventor: Jin-Shown Shie
  • Patent number: 5860741
    Abstract: An absolute radiation thermometer capable of evaluating the absolute value of infrared radiation power emitted from a target and received by a radiation sensor by means of electrical calibration, and calculating the temperature of the target basing on the responsive signal generated in the radiation sensor. To solve "Microphonic" problem, two identical sensors connected in parallel with the polarized orientations of their pyroelectric layers being in opposite directions so as to cancel the piezoelectric signals generated in the two sensors are used. Further, by using a floating power supply, which is isolated from the system power supply of the thermometer, for performing electrical heating, power supply noise can be greatly reduced.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: January 19, 1999
    Assignees: Oriental System Technology, Inc., Opto Tech Corporation, Metrodyne Co., Ltd.
    Inventors: Simon Tsao, Jin-Shown Shie, James Huang, Clark Liang, San-Bao Lin, Mang Ou-Yang, Jerry You
  • Patent number: 5820264
    Abstract: A waveguide for tympanic thermometer formed by an elongate hollow member having substantially ellipsoidal shape truncated at both ends along its major axis direction. The waveguide is interposed between a tympanic membrane of which the temperature is to be measured and an infrared radiation sensor so as to guide the infrared radiation from the tympanic membrane to the sensor. Alternatively, the waveguide may also be a hollow member including an end portion having a gradually reduced inner diameter toward the side of sensor. The gradually reduced end portion is preferably of a truncated half ellipsoidal shape having a length between about 1/10 to about 1/3 of the distance from the sensor to the distal end of the waveguide.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: October 13, 1998
    Assignees: Oriental System Technology, Inc., Opto Tech Corporation, Metrodyne Co., Ltd.
    Inventors: Simon Tsao, Jin-Shown Shie, James Huang, Clark Liang, San Bao Lin, Mang Ou-Yang, Jerry You