Patents by Inventor Jin-sook Choi

Jin-sook Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240108049
    Abstract: The present invention relates to a composition for the diagnosis of a degenerative brain disease, comprising hpmA, which is a substance derived from Proteus, Shigella, Klebsiella pneumoniae, or Citrobacter, preferably a Proteus mirabilis strain, from a biological sample of a subject. In addition, the present invention relates to a method for providing information for the diagnosis of a degenerative brain disease such as Parkinson's disease, brain neuritis (neuroinflammation), or Alzheimer's disease, by measuring the amount of hpmA.
    Type: Application
    Filed: December 21, 2021
    Publication date: April 4, 2024
    Inventors: Myung Sook Oh, Dong Hyun Kim, Jin Gyu Choi, Eugene Huh
  • Patent number: 9035396
    Abstract: In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-ho Kwon, Sang-youn Jo, Jin-sook Choi, Chang-ki Hong, Bo-un Yoon, Hong-soo Kim, Se-rah Yun
  • Publication number: 20120028435
    Abstract: In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.
    Type: Application
    Filed: September 22, 2011
    Publication date: February 2, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byoung-ho Kwon, Sang-youn Jo, Jin-sook Choi, Chang-ki Hong, Bo-un Yoon, Hong-soo Kim, Se-rah Yun
  • Patent number: 8053845
    Abstract: In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-ho Kwon, Sang-youn Jo, Jin-sook Choi, Chang-ki Hong, Bo-un Yoon, Hong-soo Kim, Se-rah Yun
  • Patent number: 7844940
    Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: November 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-pil Shin, Jin-sook Choi, Moon-hyun Yoo, Jong-bae Lee
  • Publication number: 20090121296
    Abstract: In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions.
    Type: Application
    Filed: November 7, 2008
    Publication date: May 14, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byoung-ho Kwon, Sang-youn Jo, Jin-sook Choi, Chang-ki Hong, Bo-un Yoon, Hong-soo Kim, Se-rah Yun
  • Publication number: 20080193864
    Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 14, 2008
    Inventors: Jae-pil Shin, Jin-sook Choi, Moon-hyun Yoo, Jong-bae Lee
  • Publication number: 20080193863
    Abstract: Provided are a mask set for in-situ synthesizing probes of a microarray, a method of fabricating the mask set, and a method of fabricating the microarray using the mask set. A mask set for a microarray includes a plurality of masks for in-situ synthesizing probes onto a substrate which includes an array of a plurality of probe cells, wherein each mask includes light-transmitting regions and light-blocking regions, each probe cell corresponds to a light-transmitting region or a light-blocking region, and a pattern of each light-transmitting region is corrected for an optical proximity effect.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 14, 2008
    Inventors: Jae-pil Shin, Jin-sook Choi, Jung-hwan Hah, Moon-hyun Yoo, Jong-bae Lee
  • Publication number: 20070174802
    Abstract: A method of adjusting pattern density includes determining a reference pattern density, defining dummy generation fields and designed patterns, forming basic dummy patterns on the dummy generation fields, evaluating a total pattern density from a sum of a density of the designed patterns and a density of the basic dummy patterns, adjusting a size of the basic dummy patterns so that the total pattern density reaches the reference pattern density, and combining data of the adjusted dummy patterns with data of the designed patterns.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 26, 2007
    Inventors: Jae-Pil SHIN, Moon-Hyun Yoo, Jong-Bae Lee, Jin-Sook Choi, Sung Gyu Park