Patents by Inventor Jin-su Ko

Jin-su Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968937
    Abstract: A light module includes a first light emitter, a second light emitter, a third light emitter, and a controller. The first light emitter is configured to emit a first light having a first peak wavelength in a visible range, the second light emitter is configured to emit a second light having a waveform having a second peak wavelength higher than the first peak wavelength, and the third light emitter is configured to emit a third light having a third peak wavelength that is shorter than the first peak wavelength. The controller is configured to control the first light emitter, the second light emitter, and the third light emitter to generate a first light pattern and a second light pattern. The first light pattern comprises a first light spectrum and the second light pattern comprises a second light spectrum including at least one more peak wavelength than the first light spectrum.
    Type: Grant
    Filed: October 6, 2023
    Date of Patent: April 30, 2024
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Se Ryung Kim, Sang Min Ko, Jin Won Kim, Hyun Su Song
  • Patent number: 11945925
    Abstract: Provided are a polyimide-based film having excellent visibility, a film for a cover window, and a display device including the same.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 2, 2024
    Assignees: SK Innovation Co., Ltd., SK ie technology Co., Ltd.
    Inventors: Jin Su Park, Keon Hyeok Ko, Byoung Sun Ko, Jong Nam Ahn, Tae Sug Jang
  • Patent number: 11917958
    Abstract: A light source includes a controller configured to turn on or off a plurality of light sources depending on a light period. The controller can be configured to turn on the light sources during each of a plurality of light periods such that the light sources emit a light having a spectrum with a plurality of peaks toward the plant. At least one light period can include a first period and a second period and the first period preceding or following the second period. The controller can adjust the spectrum of the light between the first period and the second period and/or during different light periods.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: March 5, 2024
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Se Ryung Kim, Sang Min Ko, Jin Won Kim, Hyun Su Song
  • Patent number: 11631614
    Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: April 18, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Jin-Su Ko, Beomsup Kim, Periannan Chidambaram
  • Publication number: 20220084883
    Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Inventors: Jonghae KIM, Jin-Su KO, Beomsup KIM, Periannan CHIDAMBARAM
  • Patent number: 11211290
    Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: December 28, 2021
    Assignee: Qualcomm Incorporated
    Inventors: Jonghae Kim, Jin-Su Ko, Beomsup Kim, Periannan Chidambaram
  • Publication number: 20210296170
    Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.
    Type: Application
    Filed: March 17, 2020
    Publication date: September 23, 2021
    Inventors: Jonghae KIM, Jin-Su KO, Beomsup KIM, Periannan CHIDAMBARAM
  • Patent number: 10985793
    Abstract: An advantageously fast and asynchronous interface is disclosed for the tuning of an RF frontend. The interface transmits a tuning word to the RF frontend that controls a tuning of the RF frontend responsive to a channel index.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: April 20, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Chan Hong Park, Charles James Persico, Beomsup Kim, Yongwang Ding, Jin-Su Ko
  • Publication number: 20210105038
    Abstract: An advantageously fast and asynchronous interface is disclosed for the tuning of an RF frontend. The interface transmits a tuning word to the RF frontend that controls a tuning of the RF frontend responsive to a channel index.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 8, 2021
    Inventors: Chan Hong PARK, Charles James PERSICO, Beomsup KIM, Yongwang DING, Jin-Su KO
  • Patent number: 9712195
    Abstract: An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: July 18, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng-Han Wang, Conor Donovan, Jesse Aaron Richmond, Jin-Su Ko
  • Publication number: 20160336983
    Abstract: An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.
    Type: Application
    Filed: May 13, 2015
    Publication date: November 17, 2016
    Inventors: Cheng-Han Wang, Conor Donovan, Jesse Aaron Richmond, Jin-Su Ko
  • Patent number: 9350589
    Abstract: Aspects of a wireless apparatus and a method for handling a modulated signal include a frequency generator that produces a clock signal, a first synchronization circuit that generates a first sync enable signal based on an even edge of the clock signal, a second synchronization circuit that generates a second sync enable signal based on an even edge of the clock signal, a first divider having a first initial operating condition that generates a first IQ path based on the first sync enable signal, and a second divider having a second initial operating condition that generates a second IQ path based on the second sync enable signal, wherein the first and second operating conditions are not equal when initially powered.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: May 24, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Kiyong Choi, Jeongsik Yang, Jin-Su Ko, Yi Zeng
  • Patent number: 9350392
    Abstract: An RFIC configuration for reduced antenna trace loss is disclosed. In an exemplary embodiment, an apparatus includes a primary RFIC and a secondary RFIC that is configured to receive analog signals from at least two antennas. The secondary RFIC is configured to process selected analog signals received from at least one antenna to generate an analog output that is input to the primary RFIC.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: May 24, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: I-Hsiang Lin, Zhijie Xiong, Seshagiri Krishnamoorthy, Jin-Su Ko, Prashanth Akula, Liang Zhao, Kevin Hsi Huai Wang, Desong Zhao
  • Patent number: 9341721
    Abstract: A global navigation satellite system (GNSS) receiver includes at least one GNSS antenna configured to receive input signaling from at least a first GNSS source and a second GNSS source; an in-phase/quadrature (I/Q) mixer coupled to the at least one GNSS antenna and configured to process the input signaling to obtain complex intermediate signaling; a first complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a first frequency range to obtain first real output signaling; a second complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a second frequency range to obtain second real output signaling; and a signal combiner coupled to the first and second complex filters and configured to generate combined real output signaling by combining the first real output signaling and the second real output signaling.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 17, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Cheng-Han Wang, Hong Sun Kim, Liang Zhao, Jin-Su Ko
  • Publication number: 20160056987
    Abstract: Aspects of a wireless apparatus and a method for handling a modulated signal include a frequency generator that produces a clock signal, a first synchronization circuit that generates a first sync enable signal based on an even edge of the clock signal, a second synchronization circuit that generates a second sync enable signal based on an even edge of the clock signal, a first divider having a first initial operating condition that generates a first IQ path based on the first sync enable signal, and a second divider having a second initial operating condition that generates a second IQ path based on the second sync enable signal, wherein the first and second operating conditions are not equal when initially powered.
    Type: Application
    Filed: August 21, 2014
    Publication date: February 25, 2016
    Inventors: Kiyong CHOI, Jeongsik YANG, Jin-Su KO, Yi ZENG
  • Patent number: 9231716
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating a two-tone signal for performing linearity calibration of a radio frequency (RF) circuit. One example apparatus generally includes a tone generating circuit configured to generate a first single-tone signal from a digital clock signal and a mixer connected with the tone generating circuit and configured to mix the first single-tone signal with a second single-tone signal to provide a two-tone signal having frequencies at a sum and a difference of frequencies of the first and second single-tone signals.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: January 5, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jesse Aaron Richmond, Cheng-Han Wang, Mohammad Bagher Vahid Far, Yi Zeng, Jin-Su Ko
  • Patent number: 9176233
    Abstract: Systems, apparatus and methods in a mobile device to multiplex two global navigation satellite system (GNSS) signals on a single hardware receiver chain are presented. The GNSS signals may come from a common GNSS system on two bands of two different GNSS systems overlapping on a common band. A duty cycle of the GNSS signals may be based on a harmonic being within one of the first band and the second band. The duty cycle may be based on signal quality, such as indicating a jammed or non jammed signal. The duty cycle may be of unequal proportions and less than 100% such that the receiver chain is idle for a percentage of time.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: November 3, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Alireza Khalili, Hong Sun Kim, Jin-Su Ko
  • Publication number: 20150311989
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating a two-tone signal for performing linearity calibration of a radio frequency (RF) circuit. One example apparatus generally includes a tone generating circuit configured to generate a first single-tone signal from a digital clock signal and a mixer connected with the tone generating circuit and configured to mix the first single-tone signal with a second single-tone signal to provide a two-tone signal having frequencies at a sum and a difference of frequencies of the first and second single-tone signals.
    Type: Application
    Filed: April 29, 2014
    Publication date: October 29, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jesse Aaron RICHMOND, Cheng-Han WANG, Mohammad Bagher VAHID FAR, Yi ZENG, Jin-Su KO
  • Patent number: 8995591
    Abstract: A wireless communication device configured for receiving multiple signals is described. The wireless communication device includes a single-chip carrier aggregation receiver architecture. The single-chip carrier aggregation receiver architecture includes a first antenna, a second antenna, a third antenna, a fourth antenna and a transceiver chip. The transceiver chip includes multiple carrier aggregation receivers. The single-chip carrier aggregation receiver architecture reuses at least one of the carrier aggregation receivers for secondary diversity.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 31, 2015
    Assignee: QUALCOMM, Incorporated
    Inventors: Prasad Srinivasa Siva Gudem, Liang Zhao, Jin-Su Ko, Hong Sun Kim
  • Patent number: 8874063
    Abstract: Methods and circuits can down convert at least a first RF signal on a first path in a first frequency band to provide a first IF signal. A second RF signal on second path in a second frequency band can be down converted to provide a second IF signal. The first IF signal and the second IF signal are interspersed in the frequency domain, and the first frequency band is different from the second frequency band. A combiner can combine at least part of the first IF signal and the second IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. The first IF signal or second IF signal can be a Zero IF (ZIF), very low IF (VLIF), or Low IF (LIF) signal.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: October 28, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Jin-Su Ko, Hong Sun Kim, Liang Zhao, Cheng-Han Wang, Dominic Gerard Farmer