Abstract: A light source includes a controller configured to turn on or off a plurality of light sources depending on a light period. The controller can be configured to turn on the light sources during each of a plurality of light periods such that the light sources emit a light having a spectrum with a plurality of peaks toward the plant. At least one light period can include a first period and a second period and the first period preceding or following the second period. The controller can adjust the spectrum of the light between the first period and the second period and/or during different light periods.

Abstract: The present invention relates to an image encoding/decoding method and device. The image decoding method according to the present invention comprises the steps of: decoding a prediction mode index; determining whether the prediction mode index indicates function-based intra prediction; inducing a parameter (s) for generating a function, when the prediction mode index indicates the function-based intra prediction; generating the function on the basis of the induced parameter (s); and performing intra prediction by using the generated function.

Abstract: A technology of fabricating a piezoelectric composite applicable to an ultrasonic transducer is disclosed. According to one aspect of the present disclosure, a support member formed with a plurality of through holes is located on one surface of an electrode plate, and lower surfaces of piezoelectric pillars having shapes respectively corresponding to the through holes are adhered onto the one surface of the electrode plate to form the piezoelectric pillars. Further, according to an additional aspect, the plurality of piezoelectric pillars having shapes corresponding to the through holes of the support member are formed by sintering a piezoelectric pellet molded in a pillar shape.

Abstract: Certain aspects of the present disclosure are directed towards an apparatus for power management. The apparatus generally includes a switch and logic configured to: receive an input to configure the apparatus in a deep sleep mode; and open the switch to turn off power from a voltage rail to at least one first circuit having leakage current that is greater than a threshold, wherein at least one second circuit having leakage current less than the threshold is coupled to the voltage rail.

Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.

Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.

Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.

Abstract: Certain aspects of the present disclosure are generally directed to techniques and apparatus for adjusting capacitance in one or more metal-insulator-metal (MIM) capacitors in an effort to reduce capacitance variation between semiconductor devices and improve yield during fabrication. One example method for fabricating a semiconductor device generally includes measuring a capacitance value of a MIM capacitor of the semiconductor device, determining the measured capacitance value of the MIM capacitor is above a target capacitance value for the MIM capacitor, and selectively rupturing a set of connections in the MIM capacitor based on the measured capacitance value. Selectively rupturing the set of connections in the MIM capacitor may reduce the capacitance value of the MIM capacitor to a value approximately that of the target capacitance value.

Abstract: An advantageously fast and asynchronous interface is disclosed for the tuning of an RF frontend. The interface transmits a tuning word to the RF frontend that controls a tuning of the RF frontend responsive to a channel index.

Abstract: An advantageously fast and asynchronous interface is disclosed for the tuning of an RF frontend. The interface transmits a tuning word to the RF frontend that controls a tuning of the RF frontend responsive to a channel index.

Abstract: An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.

Abstract: An amplifier includes a gain transistor including a control terminal to receive an input signal. A degeneration inductor is coupled between the first terminal of the gain transistor and ground. A shunt inductor and a capacitor are coupled in series between the control terminal of the gain transistor and ground, and form a filter to attenuate frequencies of the input signal within a frequency range. The degeneration inductor and the shunt inductor form a transformer to provide impedance matching.

Abstract: An RFIC configuration for reduced antenna trace loss is disclosed. In an exemplary embodiment, an apparatus includes a primary RFIC and a secondary RFIC that is configured to receive analog signals from at least two antennas. The secondary RFIC is configured to process selected analog signals received from at least one antenna to generate an analog output that is input to the primary RFIC.

Abstract: Aspects of a wireless apparatus and a method for handling a modulated signal include a frequency generator that produces a clock signal, a first synchronization circuit that generates a first sync enable signal based on an even edge of the clock signal, a second synchronization circuit that generates a second sync enable signal based on an even edge of the clock signal, a first divider having a first initial operating condition that generates a first IQ path based on the first sync enable signal, and a second divider having a second initial operating condition that generates a second IQ path based on the second sync enable signal, wherein the first and second operating conditions are not equal when initially powered.

Abstract: A global navigation satellite system (GNSS) receiver includes at least one GNSS antenna configured to receive input signaling from at least a first GNSS source and a second GNSS source; an in-phase/quadrature (I/Q) mixer coupled to the at least one GNSS antenna and configured to process the input signaling to obtain complex intermediate signaling; a first complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a first frequency range to obtain first real output signaling; a second complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a second frequency range to obtain second real output signaling; and a signal combiner coupled to the first and second complex filters and configured to generate combined real output signaling by combining the first real output signaling and the second real output signaling.

Abstract: Aspects of a wireless apparatus and a method for handling a modulated signal include a frequency generator that produces a clock signal, a first synchronization circuit that generates a first sync enable signal based on an even edge of the clock signal, a second synchronization circuit that generates a second sync enable signal based on an even edge of the clock signal, a first divider having a first initial operating condition that generates a first IQ path based on the first sync enable signal, and a second divider having a second initial operating condition that generates a second IQ path based on the second sync enable signal, wherein the first and second operating conditions are not equal when initially powered.

Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating a two-tone signal for performing linearity calibration of a radio frequency (RF) circuit. One example apparatus generally includes a tone generating circuit configured to generate a first single-tone signal from a digital clock signal and a mixer connected with the tone generating circuit and configured to mix the first single-tone signal with a second single-tone signal to provide a two-tone signal having frequencies at a sum and a difference of frequencies of the first and second single-tone signals.

Abstract: Systems, apparatus and methods in a mobile device to multiplex two global navigation satellite system (GNSS) signals on a single hardware receiver chain are presented. The GNSS signals may come from a common GNSS system on two bands of two different GNSS systems overlapping on a common band. A duty cycle of the GNSS signals may be based on a harmonic being within one of the first band and the second band. The duty cycle may be based on signal quality, such as indicating a jammed or non jammed signal. The duty cycle may be of unequal proportions and less than 100% such that the receiver chain is idle for a percentage of time.

Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating a two-tone signal for performing linearity calibration of a radio frequency (RF) circuit. One example apparatus generally includes a tone generating circuit configured to generate a first single-tone signal from a digital clock signal and a mixer connected with the tone generating circuit and configured to mix the first single-tone signal with a second single-tone signal to provide a two-tone signal having frequencies at a sum and a difference of frequencies of the first and second single-tone signals.

Abstract: A wireless communication device configured for receiving multiple signals is described. The wireless communication device includes a single-chip carrier aggregation receiver architecture. The single-chip carrier aggregation receiver architecture includes a first antenna, a second antenna, a third antenna, a fourth antenna and a transceiver chip. The transceiver chip includes multiple carrier aggregation receivers. The single-chip carrier aggregation receiver architecture reuses at least one of the carrier aggregation receivers for secondary diversity.