Patents by Inventor Jin Su Yeo

Jin Su Yeo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ENVIRONMENT-FRIENDLY ARTIFICIAL MARBLE WITH COFFEE SCENT USING BREWED COFFEE POWDER AND COFFEE BY-PRODUCTS AND METHOD FOR MANUFACTURING SAME
    Publication number: 20170036958
    Abstract: Disclosed are: an environment-friendly artificial marble which can release a coffee scent and shows a pleasing natural aesthetic by adding ground brewed coffee or coffee by-products, which are the grounds discarded when coffee is made with coffee powder or brewed coffee and the like, during the manufacture of an artificial marble; and a method for manufacturing the same.
    Type: Application
    Filed: April 17, 2014
    Publication date: February 9, 2017
    Inventors: Kang Young Cho, Guk Tae Kim, Sang Hyun Lee, Jin Su Yeo, Ju Do Eom
  • PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
    Publication number: 20150017477
    Abstract: The present invention relates to a printed circuit board, which includes a metal circuit layer electrically connected to an electronic component, a solder layer formed on an upper surface of the metal circuit layer, an intermetallic compound layer formed between the solder layer and the metal circuit layer, and a chunk portion formed in the intermetallic compound layer according to the thickness of the metal circuit layer, wherein the thickness of the metal circuit layer is 20 to 50 ?m, and a manufacturing method thereof.
    Type: Application
    Filed: July 8, 2014
    Publication date: January 15, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Cheol Ho HEO, Kwang Jin Kim, Jin Su Yeo, Young Ho Lee, Chul Min Lee, Joong Hyuk Jung
  • Substrate structure and method of manufacturing the same
    Patent number: 8759986
    Abstract: Provided is a substrate structure including: a base substrate on which a conductive pattern is formed; a first plating layer covering the conductive pattern; and a second plating layer covering the first plating layer, wherein the first plating layer includes an electroless reduction plating layer.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: June 24, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chul Min Lee, Won Hyung Park, Kyung Jin Heo, Dek Gin Yang, Jin Su Yeo, Sung Wook Chun
  • Substrate structure and method of manufacturing the same
    Publication number: 20120171432
    Abstract: Provided is a substrate structure including: a base substrate on which a conductive pattern is formed; a first plating layer covering the conductive pattern; and a second plating layer covering the first plating layer, wherein the first plating layer includes an electroless reduction plating layer.
    Type: Application
    Filed: November 10, 2011
    Publication date: July 5, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Chul Min Lee, Won Hyung Park, Kyung Jin Heo, Dek Gin Yang, Jin Su Yeo, Sung Wook Chun