Abstract: A display device includes: a substrate on which is disposed: an organic light emitting element which generates and emits light with which an image is displayed; a thin film transistor connected to the organic light emitting element and with which the organic light emitting element is controlled to emit the light; an interlayer insulating layer disposed between the thin film transistor and the organic light emitting element, the interlayer insulating layer including an organic material; and a capping layer disposed between the interlayer insulating layer and the organic light emitting element, the capping layer including an inorganic material. The interlayer insulating layer disposed between the thin film transistor and the organic light emitting element does not have photosensitivity and does not include sulfur.

Abstract: Provided is an anti-reflection glass substrate comprising an anti-reflection layer having a predetermined thickness from the surface, the anti-reflection glass substrate being characterized in that the anti-reflection layer has at least two layers of a first layer and a second layer successively provided in the depth direction from the surface, each of the first layer and the second layer has a plurality of pores, and the porosity of the first layer is smaller than the porosity of the second layer. In addition, provided is a method for manufacturing an anti-reflection glass substrate, the method successively comprising a step of etching a glass substrate using a first etching liquid and a step of etching the glass substrate using a second etching liquid, the method being characterized in that the molarity of multivalent metal ions of the first etching liquid is larger than the molarity of multivalent metal ions of the second etching liquid.

Abstract: An endecryptor and a control device are provided. The endecryptor includes a first SBOX configured to replace first input data with first substitution data, a transformation unit configured to replace the first input data with second substitution data and an output terminal configured to output encrypted or decrypted output data based on the first and second substitution data.

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; first metal bumps disposed on the connection pads; second metal bumps disposed on an uppermost wiring layer of the wiring layers; an encapsulant covering at least portions of each of the frame, the semiconductor chip, and the first and second metal bumps and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the uppermost wiring layer through the first and second metal bumps.

Abstract: A chip is provided, which includes a first receiving module, a protocol logic module, a color space conversion module, a compression module and a transmitting module. The first receiving module is configured to receive a digital video signal. The protocol logic module is configured to perform protocol unpacking on the digital video signal to obtain a video code stream. The color space conversion module is configured to perform color space conversion on the video code stream. The compression module is configured to perform lossless compression on the video code stream obtained by the color space conversion. The transmitting module is configured to transmit the video code stream obtained by the lossless compression.

Abstract: An electric vehicle (EV) parallel charging method may comprise determining whether a parallel charging input is detected or not, the parallel charging input being an input that both a conductive charging input and an inductive charging input are sensed; in response to determining that the parallel charging input is detected, comparing a power of the conductive charging input with a power of the inductive charging input; selecting an input applied to a high-voltage battery and an input applied to at least one of an auxiliary battery and a load based on a result of the comparison; and performing a parallel charging operation for the high-voltage battery and at least one of the auxiliary battery and the load by using powers supplied from the selected inputs.

Abstract: A method of manufacturing a CIGS-based solar cell including a transparent rear electrode, the method comprising forming a rear electrode layer including a transparent oxide material; forming rear electrode patterns including a metal material on the rear electrode layer; forming a CIGS-based light absorption layer on the rear electrode layer on which the rear electrode patterns are formed; forming a buffer layer on the light absorption layer; and forming a front electrode including a transparent material on the buffer layer, wherein the rear electrode patterns are provided with a transmissive portion, through which light is transmitted, formed between patterns of the metal material.

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; a first encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; an electronic component disposed on the other surface of the frame opposing one surface of the frame in which the semiconductor chip is disposed; a second encapsulant covering at least portions of the electronic component; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer, wherein the connection pads and the electronic component are electrically connected to each other through the wiring layers and the redistribution layer.

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface, and disposed in the recess portion so that the inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other, wherein the stopper layer includes an insulating material.

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer electrically connecting the wiring layers of the frame and the connection pads of the semiconductor chip to each other. A lowermost wiring layer of the wiring layers is embedded in the frame and has a lower surface exposed from a lowermost insulating layer of the frame.

Abstract: A display device including a first substrate having a first surface including a display area and a non-display area disposed outside of the display area, the display area comprising a plurality of pixels, a plurality of color filters disposed on the first surface of the first substrate, and an organic film disposed to cover the color filters. The color filters include first, second, and third color filters corresponding to the pixels and disposed in the display area, a fourth color filter disposed in the non-display area, and a fifth color filter disposed on the fourth color filter, in which at least one of the fourth and fifth color filters is spaced apart from the display area.

Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip disposed in the recess portion, and having connection pads, an active surface on which the connection pads are disposed, and an inactive surface opposing the active surface and disposed on the stopper layer; an encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; and a connection member disposed on the frame and the active surface of the semiconductor chip and including a redistribution layer electrically connecting the plurality of wiring layers of the frame and the connection pads of the semiconductor chip to each other. The active surface of the semiconductor chip and an upper surface of the encapsulant have a step portion therebetween.

Abstract: A fan-out semiconductor package module includes a core member having first and second through-holes. A semiconductor chip is in the first through-hole and has an active surface with a connection pad and an inactive surface opposing the active surface. Another passive component is in the second through-hole. An first encapsulant covers at least portions of the core member and the passive component, and fills at least a portion of the second through-hole. A reinforcing member is on the first encapsulant. A second encapsulant covers at least a portion of the semiconductor chip, and fills at least a portion of the first through-hole. A connection member is on the core member, the active surface of the semiconductor chip, and the passive component, and includes a redistribution layer electrically connected to the connection pad and the passive component.

Abstract: Various embodiments of the present invention relate to a vehicle control device and an operating method therefore. According to one embodiment, the vehicle control device includes: an open door determination unit for acquiring an open door measurement value from an on-board diagnostics (OBD) unit of a vehicle; an acceleration sensing unit for acquiring an acceleration value from the OBD unit; and a processing unit for blocking the acquired acceleration value to be transmitted from the OBD unit to an electronic control unit (ECU) and transmitting a default value of the acceleration value to the ECU, when it is determined, on the basis of the open door measurement value, that a vehicle door is open.

Abstract: A semiconductor package includes a semiconductor chip having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least a portion of the semiconductor chip; and a connection member including an insulating layer disposed on the active surface of the semiconductor chip, a signal pattern disposed in the insulating layer, first ground patterns disposed to be spaced apart from the signal pattern on both sides of the signal pattern, second ground patterns disposed to be spaced apart from the signal pattern in an upper portion and a lower portion of the signal pattern, and line vias connecting the first ground patterns and the second ground patterns to each other and having a line shape.

Abstract: A semiconductor package includes: a connection member having first and second surfaces opposing each other and including a redistribution layer; a support member disposed on the first surface of the connection member, including a cavity, and having an inner sidewall surrounding the cavity of which an upper region is chamfered; a semiconductor chip disposed on the connection member in the cavity and having connection pads electrically connected to the redistribution layer; at least one electronic component disposed between the semiconductor chip and the inner sidewall and having connection terminals electrically connected to the redistribution layer; and an encapsulant encapsulating the semiconductor chip and the at least one electronic component disposed in the cavity.

Abstract: An automatic component loading system is disclosed. The automatic component loading system has a loading device, a conveying device having a plurality of first pin receiving slots and a plurality of first component receiving trays positioned around a circumference of the conveying device, and a position correcting device having at least one pin that corresponds with the plurality of first pin receiving slots.

Abstract: A light emitting device includes a substrate. A thin film transistor is disposed on the substrate. A first electrode is connected to the thin film transistor. A second electrode at least partially overlaps the first electrode. A first partition wall is disposed between the first electrode and the second electrode. An insulating layer is disposed between the thin film transistor and the first electrode. The insulating layer includes a first part having a first thickness and a second part having a second thickness that is different than the first thickness. The second part of the insulating layer at least partially overlaps the first partition wall.

Abstract: An optical imaging system includes a first lens, a second lens, a third lens, a fourth lens, a fifth lens, a sixth lens, and a seventh lens, disposed in order from an object side to an imaging plane. One or any combination of the first lens to the seventh lens are formed of glass. One or both surfaces of one or more of the first lens to the seventh lens are aspherical. A pair of lenses, among the first lens to the seventh lens, allows paraxial areas opposing each other to be bonded to each other.

Abstract: A semiconductor memory apparatus includes a memory cell. The semiconductor apparatus includes a current supply circuit configured to change a resistance state of the memory cell, by changing an amount of current flowing through the memory cell, with or without limiting a voltage level across the memory cell to a level of a clamping voltage based on a state of the memory cell.