Abstract: Disclosed are a display device and a method of manufacturing the display device. The display device includes a display panel on which a plurality of sub-pixels and lines connected to the sub-pixels and a driving circuit configured to drive the sub-pixels. The display panel further includes a plurality of protruded bank patterns disposed in the sub-pixels, and a light emitting element disposed in each of the bank patterns. The light emitting element includes a first electrode, a second electrode, a light emitting layer disposed between the first electrode and the second electrode, and a reflector that covers side surfaces of the light emitting layer and at least a portion of side surfaces of the first electrode. The reflector includes a first insulating layer, a second insulating layer, and a metal layer disposed between the first insulating layer and the second insulating layer.

Abstract: Proposed is a method for providing an emoticon input interface by a user terminal. The method may include displaying a first input interface for inputting an emoticon to be posted on a profile page of a user. The method may also include receiving a selection interaction of selecting a first emoticon to be posted on the profile page of the user via the first input interface, and displaying the selected first emoticon on the profile page of the user. The first input interface may include user custom information associated with emoticon historical information of the user. The user custom information may be identical to at least a part of user custom information for a second input interface for inputting an emoticon to be displayed in a chat message.

Abstract: A semiconductor device includes: a horizontal layer spaced apart from a lower structure and extending in a direction parallel to the lower structure; a vertical conductive line extending in a direction perpendicular to the lower structure and coupled to one end of the horizontal layer; a data storage element coupled to another end of the horizontal layer; and a horizontal conductive line extending in a direction crossing the horizontal layer, wherein the horizontal conductive line includes: a first work function electrode; a second work function electrode adjacent to the vertical conductive line and having a lower work function than the first work function electrode; a third work function electrode having a lower work function than the first work function electrode; a first barrier layer between the first and third work function electrodes; and a second barrier layer between the first and second work function electrode.

Abstract: A semiconductor device includes a horizontal layer spaced apart from a lower structure to extend in a direction parallel to the lower structure; a vertical conductive line extending in a direction perpendicular to the lower structure and coupled to a first-side end of the horizontal layer; a data storage element coupled to a second-side end of the horizontal layer; and a horizontal conductive line including a first horizontal conductive line and a second horizontal conductive line that are vertically asymmetrical with the horizontal layer interposed therebetween.

Abstract: A semiconductor device includes: a lower structure; a horizontal conductive line which is oriented horizontally over the lower structure; a data storage element which is disposed over the lower structure to be spaced from the horizontal conductive line; a vertical conductive line which is vertically oriented between the horizontal conductive line and the data storage element; a horizontal layer which is oriented horizontally between the horizontal conductive line and the data storage element, and including a recessed side which is disposed adjacent to the vertical conductive line; and a body contact portion oriented which is vertically oriented by penetrating the horizontal layer.

Abstract: A semiconductor memory device includes: an active layer spaced apart from a substrate wherein the active layer extends in a direction parallel to the substrate, and includes a channel; a bit line extending in a direction perpendicular to the substrate and coupled to a first end of the active layer; a capacitor coupled to a second end of the active layer; and a double word line including a pair of dual work function electrodes that extend in a direction crossing the active layer with the active layer interposed therebetween, wherein each of the dual work function electrodes includes: a high work function electrode which is adjacent to the bit line; and a low work function electrode which is adjacent to the capacitor and having a lower work function than the high work function electrode.

Abstract: A semiconductor device includes: a lateral layer spaced apart from a lower structure and extending in a direction parallel to the lower structure; a vertical conductive line extending in a direction perpendicular to the lower structure and coupled to a first-side end of the lateral layer; a data storage element coupled to a second-side end of the lateral layer; and a lateral conductive line extending in a direction crossing the lateral layer, wherein the lateral conductive line includes: a first work function electrode; a second work function electrode disposed adjacent to the vertical conductive line and having a lower work function than the first work function electrode; and a third work function electrode disposed adjacent to the data storage element and having a lower work function than the first work function electrode.

Abstract: The present disclosure relates to a novel integrate-and-fire (IF) neuron circuit using a single-gated feedback field-effect transistor (FBFET) to realize small size and low power consumption. According to the present disclosure, the neuron circuit according to one embodiment may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a threshold value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a single-gated feedback field-effect transistor connected to the capacitor. Then, the neuron circuit may reset the generated spike voltage using transistors connected to the feedback field-effect transistor.

Abstract: A semiconductor memory device includes: an active layer spaced apart from a substrate wherein the active layer extends in a direction parallel to the substrate, and includes a channel; a bit line extending in a direction perpendicular to the substrate and coupled to a first end of the active layer; a capacitor coupled to a second end of the active layer; and a double word line including a pair of dual work function electrodes that extend in a direction crossing the active layer with the active layer interposed therebetween, wherein each of the dual work function electrodes includes: a high work function electrode which is adjacent to the bit line; and a low work function electrode which is adjacent to the capacitor and having a lower work function than the high work function electrode.

Abstract: The present disclosure relates to a novel integrate-and-fire (IF) neuron circuit using a single-gated feedback field-effect transistor (FBFET) to realize small size and low power consumption. According to the present disclosure, the neuron circuit according to one embodiment may generate potential by charging current input from synapses through a capacitor. In this case, when the generated potential exceeds a threshold value, the neuron circuit may generate and output a spike voltage corresponding to the generated potential using a single-gated feedback field-effect transistor connected to the capacitor. Then, the neuron circuit may reset the generated spike voltage using transistors connected to the feedback field-effect transistor.

Abstract: The present disclosure discloses a feedback field-effect electronic device using a feedback loop operation and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the array circuit includes a plurality of feedback field-effect electronic devices in which the source region of a diode structure and the drain region of an access electronic device are connected in series, wherein the diode structure is connected to a bit line and a first word line, the access electronic device is connected to a source line and a second word line, and a random access operation is performed by selectively applying voltage to the bit line and the first and second word lines.

Abstract: The present disclosure discloses a transposable feedback field-effect electronic device and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the feedback field-effect electronic device may include a diode structure, a plurality of gate electrodes, and a plurality of access electronic devices, wherein, when the diode structure receives voltage through a first gate electrode of the gate electrodes and a first access electronic device of the access electronic devices, first direction access may be performed, and when the diode structure receives voltage through a second gate electrode of the gate electrodes and a second access electronic device of the access electronic devices, second direction access may be performed.

Abstract: The present disclosure discloses a feedback field-effect array device capable of converting between volatile and non-volatile operations and an array circuit using the same. According to one embodiment of the present disclosure, the array circuit may include a plurality of feedback field-effect array devices, wherein the source region of the feedback field-effect electronic device and the drain region of an access electronic device may be connected to each other in series, the feedback field-effect electronic device may be connected to a bit line and a first word line, the access electronic device may be connected to a source line and a second word line, and any one of first and second gate voltages may be applied to the first word line to store data in a first logic state or data in a second logic state.

Abstract: The present disclosure discloses a transposable feedback field-effect electronic device and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the feedback field-effect electronic device may include a diode structure, a plurality of gate electrodes, and a plurality of access electronic devices, wherein, when the diode structure receives voltage through a first gate electrode of the gate electrodes and a first access electronic device of the access electronic devices, first direction access may be performed, and when the diode structure receives voltage through a second gate electrode of the gate electrodes and a second access electronic device of the access electronic devices, second direction access may be performed.

Abstract: The present disclosure discloses a feedback field-effect array device capable of converting between volatile and non-volatile operations and an array circuit using the same. According to one embodiment of the present disclosure, the array circuit may include a plurality of feedback field-effect array devices, wherein the source region of the feedback field-effect electronic device and the drain region of an access electronic device may be connected to each other in series, the feedback field-effect electronic device may be connected to a bit line and a first word line, the access electronic device may be connected to a source line and a second word line, and any one of first and second gate voltages may be applied to the first word line to store data in a first logic state or data in a second logic state.

Abstract: The present disclosure discloses a feedback field-effect electronic device using a feedback loop operation and an array circuit using the feedback field-effect electronic device. According to one embodiment of the present disclosure, the array circuit includes a plurality of feedback field-effect electronic devices in which the source region of a diode structure and the drain region of an access electronic device are connected in series, wherein the diode structure is connected to a bit line and a first word line, the access electronic device is connected to a source line and a second word line, and a random access operation is performed by selectively applying voltage to the bit line and the first and second word lines.