Patents by Inventor Jin Sun Lee
Jin Sun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145263Abstract: According to an aspect of the present disclosure, there is provided a substrate treating apparatus comprising: a vessel part having a substrate treatment region formed therein and including a supply port through which a treating fluid is supplied to the substrate treatment region and an exhaust port through which the treating fluid is exhausted from the substrate treatment region; a fluid supply unit configured to supply the treating fluid to the substrate treatment region; an exhaust unit configured to exhaust the treating fluid from the vessel part. The exhaust unit comprises: a main line connected to the exhaust port; an extension line branched from at least one of first and second nodes of the main line and including at least one of a first orifice or a first check valve to control an exhaust speed; and an auxiliary line branched from a third node of the main line, where an orifice and a check valve are not formed.Type: ApplicationFiled: January 20, 2023Publication date: May 2, 2024Inventors: Seung Hoon OH, Ki Bong KIM, Jong Doo LEE, Young Hun LEE, Mi So PARK, Jin Se PARK, Yong Sun KO
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Publication number: 20240142171Abstract: A substrate treating apparatus of the present disclosure comprises: a chamber member having an accommodation space configured to accommodate a vessel part where a substrate treatment region constituting a supercritical treatment space are formed, and an opening configured to move the substrate inside or outside; a shutter configured to open or close the chamber member; and a first exhaust part configured to discharge an internal air from the accommodation space to the outside, wherein the temperature of the substrate treatment region is increased.Type: ApplicationFiled: January 20, 2023Publication date: May 2, 2024Inventors: Seung Hoon OH, Ji Hyeong LEE, Jin Se PARK, Yong Joon IM, Young Hun LEE, Yong Sun KO
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Publication number: 20240147620Abstract: The present disclosure relates to a printed circuit board including, a first insulating layer, a first metal layer disposed on the first insulating layer, a bridge disposed on the first metal layer and including a bridge insulating layer and a bridge circuit layer, a second insulating layer disposed on the first insulating layer and covering at least a portion of the bridge, a second metal layer disposed on the second insulating layer, and a connecting via penetrating the bridge and the second insulating layer to connect the first metal layer to the second insulating layer. The connecting via is spaced apart from the bridge circuit layer.Type: ApplicationFiled: April 17, 2023Publication date: May 2, 2024Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jin Uk LEE, Youn Gyu HAN, Jin Oh PARK, Yong Wan JI, Yong Duk LEE, Eun Sun KIM
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Patent number: 11968312Abstract: Disclosed herein are an apparatus and method for processing vehicle data security based on a cloud.Type: GrantFiled: November 16, 2021Date of Patent: April 23, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang-Woo Lee, Dae-Won Kim, Jin-Yong Lee, Boo-Sun Jeon, Bo-Heung Chung, Hong-Il Ju, Joong-Yong Choi
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Patent number: 11965446Abstract: The present invention relates to a VOC reduction system and a VOC reduction method that applies pulse type thermal energy to a catalyst to activate the catalyst and oxidizes and removes the VOC.Type: GrantFiled: February 20, 2020Date of Patent: April 23, 2024Assignee: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGYInventors: Jin Hee Lee, Iljeong Heo, Tae Sun Chang, Ji Hoon Park, Sang Joon Kim, Young Jin Kim
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Patent number: 11961867Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.Type: GrantFiled: June 10, 2022Date of Patent: April 16, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
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Patent number: 11943490Abstract: The method comprises registering at least one of an internet protocol (IP) address and a media access control (MAC) address of the security devices, generating a plurality of public key and private key pairs, encrypting and storing private keys comprised in the plurality of public key and private key pairs using a master key provided from a master key management unit, selecting any one of a plurality of public key and private key pairs when the access of the security device is approved and providing a certificate comprising the selected public key to the security device, receiving a symmetric key encrypted with the public key of the certificate from the security device, and decrypting the private key using the master key provided from the master key management unit.Type: GrantFiled: January 11, 2022Date of Patent: March 26, 2024Assignee: DUDU Information Technologies, Inc.Inventors: Young Sun Park, Su Man Nam, Jin Woo Lee, Jun Geol Kim, Yun Seong Kim, Yoon Jeong Kim
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Publication number: 20240088158Abstract: A display device includes: a substrate; a polycrystalline silicon film on the substrate; and a first buffer film between the substrate and the polycrystalline silicon film and having one surface contacting the polycrystalline silicon film and another surface opposite to the one surface, wherein the one surface of the first buffer film has a first root mean square (RMS) roughness range, and the first RMS roughness range is 1.5 nm or less.Type: ApplicationFiled: November 13, 2023Publication date: March 14, 2024Inventors: Ki Hyun KIM, Young Gil PARK, Jin Suk LEE, Jai Sun KYOUNG, Sug Woo JUNG
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Publication number: 20240072000Abstract: A semiconductor package includes a substrate; a substrate pad on the substrate; a first semiconductor chip and a second semiconductor chip on the substrate; a connective terminal between the substrate pad and the first semiconductor chip and between the substrate pad and the second semiconductor chip; a dummy pad on the substrate, and spaced apart from the substrate pad, wherein the dummy pad is between the first semiconductor chip and the second semiconductor chip; and an underfill material layer interposed between the substrate and the first semiconductor chip and between the substrate and the second semiconductor chip, wherein the dummy pad and the substrate pad include a same material.Type: ApplicationFiled: August 25, 2023Publication date: February 29, 2024Inventors: Jin-Woo PARK, Un-Byoung KANG, Chung Sun LEE
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Patent number: 11912674Abstract: The present invention provides methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, or organ fibrosis, which comprises administering to a subject a therapeutically effective amount of a pharmaceutical composition comprising an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.Type: GrantFiled: March 4, 2021Date of Patent: February 27, 2024Assignee: IL DONG PHARMACEUTICAL CO., LTD.Inventors: Jae-Hoon Kang, Hong-Sub Lee, Yoon-Suk Lee, Jin-Ah Jeong, Sung-Wook Kwon, Jeong-Guen Kim, Kyung-Sun Kim, Dong-Keun Song, Sun-Young Park, Kyeo-Jin Kim, Ji-Hye Choi, Hey-Min Hwang
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Patent number: 11177263Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric layer on the lower electrode, and an upper electrode on the capacitor dielectric layer. The capacitor dielectric layer includes a base layer on the lower electrode and a dielectric particle layer in at least a portion of the base layer. The base layer includes a first dielectric material, and the dielectric particle layer extends at least partially continuously along a thickness direction of the capacitor dielectric layer and includes a second dielectric material different from the first dielectric material.Type: GrantFiled: March 23, 2020Date of Patent: November 16, 2021Inventors: Se-hyoung Ahn, Youn-soo Kim, Jae-hyoung Choi, Jae-wan Chang, Sun-min Moon, Jin-sun Lee
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Publication number: 20210140048Abstract: A method of forming a material layer includes providing a substrate into a reaction chamber, providing a source material onto a substrate, the source material being a precursor of a metal or semimetal having a ligand, providing an ether-based modifier on the substrate, purging an inside of the reaction chamber, and reacting a reaction material with the source material to form the material layer.Type: ApplicationFiled: January 20, 2021Publication date: May 13, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Sun-min MOON, Youn-soo KIM, Han-jin LIM, Yong-jae LEE, Se-hoon OH, Hyun-jun KIM, Jin-sun LEE
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Publication number: 20200243531Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric layer on the lower electrode, and an upper electrode on the capacitor dielectric layer. The capacitor dielectric layer includes a base layer on the lower electrode and a dielectric particle layer in at least a portion of the base layer. The base layer includes a first dielectric material, and the dielectric particle layer extends at least partially continuously along a thickness direction of the capacitor dielectric layer and includes a second dielectric material different from the first dielectric material.Type: ApplicationFiled: March 23, 2020Publication date: July 30, 2020Inventors: Se-hyoung Ahn, Youn-soo Kim, Jae-hyoung Choi, Jae-wan Chang, Sun-min Moon, Jin-sun Lee
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Patent number: 10636795Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric layer on the lower electrode, and an upper electrode on the capacitor dielectric layer. The capacitor dielectric layer includes a base layer on the lower electrode and a dielectric particle layer in at least a portion of the base layer. The base layer includes a first dielectric material, and the dielectric particle layer extends at least partially continuously along a thickness direction of the capacitor dielectric layer and includes a second dielectric material different from the first dielectric material.Type: GrantFiled: May 15, 2019Date of Patent: April 28, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Se-hyoung Ahn, Youn-soo Kim, Jae-hyoung Choi, Jae-wan Chang, Sun-min Moon, Jin-sun Lee
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Patent number: 10600643Abstract: A method of forming a thin film and an integrated circuit device, including forming a first reaction inhibiting layer chemisorbed on a first portion of a lower film by supplying a reaction inhibiting compound having a carbonyl group to an exposed surface of the lower film at a temperature of about 300° C. to about 600° C.; forming a first precursor layer of a first material chemisorbed on a second portion of the lower film at a temperature of about 300° C. to about 600° C., the second portion being exposed through the first reaction inhibiting layer; and forming a first monolayer containing the first material on the lower film by supplying a reactive gas to the first reaction inhibiting layer and the first precursor layer and removing the first reaction inhibiting layer from the surface of the lower film, and thus exposing the first portion.Type: GrantFiled: January 10, 2018Date of Patent: March 24, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Gyu-hee Park, Youn-soo Kim, Hyun-jun Kim, Jin-sun Lee, Jae-soon Lim
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Patent number: 10468256Abstract: A method of forming a material layer includes providing a substrate into a reaction chamber, providing a source material onto a substrate, the source material being a precursor of a metal or semimetal having a ligand, providing an ether-based modifier on the substrate, purging an inside of the reaction chamber, and reacting a reaction material with the source material to form the material layer.Type: GrantFiled: April 7, 2017Date of Patent: November 5, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-min Moon, Youn-soo Kim, Han-jin Lim, Yong-jae Lee, Se-hoon Oh, Hyun-jun Kim, Jin-sun Lee
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Publication number: 20190267384Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric layer on the lower electrode, and an upper electrode on the capacitor dielectric layer. The capacitor dielectric layer includes a base layer on the lower electrode and a dielectric particle layer in at least a portion of the base layer. The base layer includes a first dielectric material, and the dielectric particle layer extends at least partially continuously along a thickness direction of the capacitor dielectric layer and includes a second dielectric material different from the first dielectric material.Type: ApplicationFiled: May 15, 2019Publication date: August 29, 2019Inventors: Se-hyoung Ahn, Youn-soo Kim, Jae-hyoung Choi, Jae-wan Chang, Sun-min Moon, Jin-sun Lee
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Patent number: 10297600Abstract: A semiconductor device includes a lower electrode on a substrate, a capacitor dielectric layer on the lower electrode, and an upper electrode on the capacitor dielectric layer. The capacitor dielectric layer includes a base layer on the lower electrode and a dielectric particle layer in at least a portion of the base layer. The base layer includes a first dielectric material, and the dielectric particle layer extends at least partially continuously along a thickness direction of the capacitor dielectric layer and includes a second dielectric material different from the first dielectric material.Type: GrantFiled: April 18, 2018Date of Patent: May 21, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Se-hyoung Ahn, Youn-soo Kim, Jae-hyoung Choi, Jae-wan Chang, Sun-min Moon, Jin-sun Lee
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Publication number: 20180342391Abstract: A method of forming a thin film and an integrated circuit device, including forming a first reaction inhibiting layer chemisorbed on a first portion of a lower film by supplying a reaction inhibiting compound having a carbonyl group to an exposed surface of the lower film at a temperature of about 300° C. to about 600° C.; forming a first precursor layer of a first material chemisorbed on a second portion of the lower film at a temperature of about 300° C. to about 600° C., the second portion being exposed through the first reaction inhibiting layer; and forming a first monolayer containing the first material on the lower film by supplying a reactive gas to the first reaction inhibiting layer and the first precursor layer and removing the first reaction inhibiting layer from the surface of the lower film, and thus exposing the first portion.Type: ApplicationFiled: January 10, 2018Publication date: November 29, 2018Inventors: Gyu-hee PARK, Youn-soo KIM, Hyun-jun KIM, Jin-sun LEE, Jae-soon LIM
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Patent number: 10103026Abstract: A method of forming a material layer includes providing a substrate into a reaction chamber, providing a source material onto a substrate, the source material being a precursor of a metal or semimetal having a ligand, providing an ether-based modifier on the substrate, purging an inside of the reaction chamber, and reacting a reaction material with the source material to form the material layer.Type: GrantFiled: August 3, 2016Date of Patent: October 16, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Sun-min Moon, Youn-soo Kim, Han-jin Lim, Yong-jae Lee, Se-hoon Oh, Hyun-jun Kim, Jin-sun Lee