Abstract: A method of producing a core-shell particle includes introducing a barium titanate-based base powder and an additive to a reactor, and exposing the barium titanate-based base powder and the additive to a thermal plasma torch to obtain core-shell particles including a core portion having barium titanate (BaTiO3) and a shell portion including the additive and formed on a surface of the core portion.

Abstract: A dielectric composition includes a ceramic powder, a high polymerization binder, and a low polymerization binder type dispersant having a degree of polymerization between 100 and 1,000.

Abstract: Disclosed is a technology relating to a method for fabricating a multilayer structure. In the method for fabricating the multilayer structure according to the disclosed embodiment, a first material layer including at least one atomic layer is deposited using a first source gas, which includes a first component, and an oxygen-containing reactive gas which is reactive with the first source gas. On the first material layer, a second material layer including at least one atomic layer is deposited using a second source gas, which includes a second component different from the first component, and an oxygen-containing reactive gas which is reactive with the second source gas. The step of depositing the first material layer and the step of depositing the second material layer constitute one cycle, and the cycle is performed at least once.

Abstract: A multilayer electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode including an electrode layer disposed on the body and connected to the internal electrode, a first plating layer disposed on the electrode layer, and a conductive resin layer disposed on the first plating layer. The first plating layer has surface roughness higher at an interface with the conductive resin layer than at an interface with the electrode layer, and the conductive resin layer includes a conductive metal and a base resin.

Abstract: A multilayer capacitor includes a capacitor body, a first external electrode, and a second external electrode. The capacitor body includes a plurality of first and second internal electrodes alternately stacked with dielectric layer interposed therebetween. The first and second external electrodes are electrically connected to the first and second internal electrodes, respectively. A first Schottky layer is Schottky-junctioned to an interface between the dielectric layer and the first internal electrode in the capacitor body. A second Schottky layer is Schottky-junctioned to an interface between the dielectric later and the second internal electrode in the capacitor body. The work function values of the first and second Schottky layers is higher than the work function values of the first and second internal electrodes.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.

Abstract: A dielectric composition includes a ceramic powder, a high polymerization binder, and a low polymerization binder type dispersant having a degree of polymerization between 100 and 1,000.

Abstract: In a method of manufacturing a multilayer ceramic capacitor, and a multilayer ceramic capacitor manufactured by the same, moisture resistance at a junction between a ceramic body and an external electrode may be improved and excellent substrate mounting properties may be provided.

Abstract: Disclosed is a technology relating to a method for fabricating a multilayer structure. In the method for fabricating the multilayer structure according to the disclosed embodiment, a first material layer including at least one atomic layer is deposited using a first source gas, which includes a first component, and an oxygen-containing reactive gas which is reactive with the first source gas. On the first material layer, a second material layer including at least one atomic layer is deposited using a second source gas, which includes a second component different from the first component, and an oxygen-containing reactive gas which is reactive with the second source gas. The step of depositing the first material layer and the step of depositing the second material layer constitute one cycle, and the cycle is performed at least once.

Abstract: A multilayer capacitor includes a capacitor body, a first external electrode, and a second external electrode. The capacitor body includes a plurality of first and second internal electrodes alternately stacked with dielectric layer interposed therebetween. The first and second external electrodes are electrically connected to the first and second internal electrodes, respectively. A first Schottky layer is Schottky-junctioned to an interface between the dielectric layer and the first internal electrode in the capacitor body. A second Schottky layer is Schottky-junctioned to an interface between the dielectric later and the second internal electrode in the capacitor body. The work function values of the first and second Schottky layers is higher than the work function values of the first and second internal electrodes.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of source/drain contacts within non-planar transistors, wherein a titanium-containing contact interface may be used in the formation of the source/drain contact with a discreet titanium silicide formed between the titanium-containing interface and a silicon-containing source/drain structure.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.

Abstract: A method for manufacturing a charge pump-based artificial lightning generator comprises the steps of: forming a second electrode on a prepared substrate; forming a negatively charged body having a sponge structure under the second electrode; removing spherical polymer particles from the negatively charged body using a toluene solution; allowing metal particles to penetrate into the negatively charged body; forming a positively charged body in a location which is at a predetermined distance below the negatively charged body in order to generate charges; nano-structuring the surface of the positively charged body; coating the nano-structured surface of the positively charged body with second metal particles; forming a ground layer for charge separation while maintaining a constant distance in the downward direction from one side of the positively charged body; and forming a first electrode for charge accumulation in a location which is at a predetermined distance below the positively charged body.

Abstract: The present description relates to the field of fabricating microelectronic devices having non-planar transistors. Embodiments of the present description relate to the formation of gates within non-planar NMOS transistors, wherein an NMOS work-function material, such as a composition of aluminum, titanium, and carbon, may be used in conjunction with a titanium-containing gate fill barrier to facilitate the use of a tungsten-containing conductive material in the formation of a gate electrode of the non-planar NMOS transistor gate.