Patents by Inventor Jinup Lim

Jinup Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12255491
    Abstract: Disclosed is a power loss protection integrated circuit. According to one embodiment, the power loss protection integrated circuit includes a buck/boost converter controller that operates in buck mode in a normal power supply state such that a portion of the power is used to store energy in a low voltage capacitor and operates in boost mode when the power supply is cut off such that the energy charged in the low voltage capacitor is utilized to supply emergency power to a main system.
    Type: Grant
    Filed: July 13, 2023
    Date of Patent: March 18, 2025
    Assignee: FADU Inc.
    Inventors: Seonho Kim, Jinup Lim, Jongchul Chae, Kichang Jang
  • Publication number: 20240305121
    Abstract: A power loss protection integrated circuit is disclosed. The power loss protection integrated circuit includes separate charge/discharge paths to a plurality of storage capacitors to enable sequential checking of the plurality of storage capacitors for short failure. When any one of the storage capacitors has a short failure, charging of the corresponding storage capacitor is stopped. The plurality of storage capacitors are sequentially checked for deterioration after charge.
    Type: Application
    Filed: January 8, 2024
    Publication date: September 12, 2024
    Applicant: FADU Inc.
    Inventors: Jinup LIM, Jungeui PARK, Jaeil LEE, Kwanseok JUNG
  • Publication number: 20240241161
    Abstract: Disclosed is a system for checking the capacity of a storage capacitor with high resolution. The system is constructed to increase the precision of correlation between a sink current and a clock frequency necessary for health check of the storage capacitor. This construction enables completion of the health check in a shorter time, minimizing both energy consumption and loss of the storage capacitor. Therefore, the system can supply sufficient energy as emergency power to a main system in an emergency power situation in which power supply is cut off.
    Type: Application
    Filed: December 27, 2023
    Publication date: July 18, 2024
    Applicant: FADU Inc.
    Inventors: Jinup LIM, Jungeui PARK, Jaeil LEE, Kwanseok JUNG
  • Publication number: 20240235392
    Abstract: Disclosed is a power loss protection integrated circuit. In the power loss protection integrated circuit, an interrupt device is arranged on an electrical path between an output terminal of a buck converter and a low voltage capacitor such that a flow of current to the low voltage capacitor is limited upon initial operation to ensure stability of an output voltage of the buck converter, and after the passage of a predetermined time, the interrupt device is fully turned on when a voltage of the low voltage capacitor is almost the same as the output voltage of the buck converter such that the voltage of the low voltage capacitor is electrically connected to the output voltage of the buck converter.
    Type: Application
    Filed: July 13, 2023
    Publication date: July 11, 2024
    Applicant: FADU Inc.
    Inventors: Seonho KIM, Jinup LIM, Jongchul CHAE, Kichang JANG
  • Publication number: 20240136924
    Abstract: Disclosed is a power loss protection integrated circuit. In the power loss protection integrated circuit, an interrupt device is arranged on an electrical path between an output terminal of a buck converter and a low voltage capacitor such that a flow of current to the low voltage capacitor is limited upon initial operation to ensure stability of an output voltage of the buck converter, and after the passage of a predetermined time, the interrupt device is fully turned on when a voltage of the low voltage capacitor is almost the same as the output voltage of the buck converter such that the voltage of the low voltage capacitor is electrically connected to the output voltage of the buck converter.
    Type: Application
    Filed: July 12, 2023
    Publication date: April 25, 2024
    Applicant: FADU Inc.
    Inventors: Seonho KIM, Jinup LIM, Jongchul CHAE, Kichang JANG
  • Publication number: 20240106317
    Abstract: The present invention relates to a direct current/direct current (DC/DC) converter. According to the present invention, output ends of a plurality of converter circuits, each having two switches in a single fabricated integrated circuit (IC), are integrated by selectively connecting them to each other in the outside depending on the amount of current required for operation of the IC. Therefore, the DC/DC converter can operate with maximum efficiency in various user-desired load current ranges.
    Type: Application
    Filed: July 13, 2023
    Publication date: March 28, 2024
    Applicant: FADU Inc.
    Inventors: Seonho KIM, Jinup LIM, Jongchul CHAE, Kichang JANG
  • Publication number: 20240063657
    Abstract: Disclosed is a power loss protection integrated circuit. According to one embodiment, the power loss protection integrated circuit includes a buck/boost converter controller that operates in buck mode in a normal power supply state such that a portion of the power is used to store energy in a low voltage capacitor and operates in boost mode when the power supply is cut off such that the energy charged in the low voltage capacitor is utilized to supply emergency power to a main system.
    Type: Application
    Filed: July 13, 2023
    Publication date: February 22, 2024
    Applicant: FADU Inc.
    Inventors: Seonho KIM, Jinup LIM, Jongchul CHAE, Kichang JANG
  • Patent number: 7414490
    Abstract: Disclosed is a dual-band voltage-controlled oscillator using bias switching and output-buffer multiplexing. The dual-band voltage-controlled oscillator includes a power supply unit for supplying a source voltage; plural voltage-controlled oscillation units for outputting different oscillation frequencies according to controls of a certain tuning voltage; plural bias units for generating driving voltages for driving the voltage-controlled oscillation units and supplying the driving voltages to the voltage-controlled oscillation units; and plural buffers for selectively outputting oscillation frequencies of the plural voltage-controlled oscillation units. The present invention implements the dual-band voltage-controlled oscillator through bias switching and output-buffer multiplexing, which brings an advantage of elimination of interference between output frequencies to enhance phase noise characteristics.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: August 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yoon Jeon, Heung-bae Lee, Seong-soo Lee, Jinup Lim, Joongho Choi
  • Publication number: 20060170512
    Abstract: Disclosed is a dual-band voltage-controlled oscillator using bias switching and output-buffer multiplexing. The dual-band voltage-controlled oscillator includes a power supply unit for supplying a source voltage; plural voltage-controlled oscillation units for outputting different oscillation frequencies according to controls of a certain tuning voltage; plural bias units for generating driving voltages for driving the voltage-controlled oscillation units and supplying the driving voltages to the voltage-controlled oscillation units; and plural buffers for selectively outputting oscillation frequencies of the plural voltage-controlled oscillation units. The present invention implements the dual-band voltage-controlled oscillator through bias switching and output-buffer multiplexing, which brings an advantage of elimination of interference between output frequencies to enhance phase noise characteristics.
    Type: Application
    Filed: November 29, 2005
    Publication date: August 3, 2006
    Inventors: Sang-yoon Jeon, Heung-bae Lee, Seong-soo Lee, Jinup Lim, Joongho Choi