Patents by Inventor Jin-won Jun

Jin-won Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240137511
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY, HANBAT NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Jin-Ho LEE, Jung-Won KANG, Hyunsuk KO, Sung-Chang LIM, Dong-San JUN, Ha-Hyun LEE, Seung-Hyun CHO, Hui-Yong KIM, Hae-Chul CHOI, Dae-Hyeok GWON, Jae-Gon KIM, A-Ram BACK
  • Publication number: 20240137507
    Abstract: The present invention relates to a video encoding/decoding method and apparatus. The video decoding method according to the present invention may comprise decoding filter information on a coding unit; classifying samples in the coding unit into classes on a per block classification unit basis; and filtering the coding unit having the samples classified into the classes on a per block classification unit basis by using the filter information.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hyun Suk KO, Jin Ho LEE, Hui Yong KIM
  • Publication number: 20240137503
    Abstract: An image encoding/decoding method is disclosed. A method of decoding an image, the method comprising, deriving an intra prediction mode for a current block, decoding at least one original sample that is present in a rightmost column and a bottommost row (a bottom row) of the current block, constructing a reference sample by using the at least one decoded original sample and performing intra prediction on the current block by using the constructed reference sample.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Hui Yong KIM
  • Publication number: 20240128123
    Abstract: A method for forming a semiconductor die, includes forming an interlayer dielectric layer on a substrate having a semiconductor die region, a seal-ring region, and a scribe line region, forming a metal pad and a test pad on the interlayer dielectric layer, forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad, first etching the passivation dielectric layer and the interlayer dielectric layer existing between the seal-ring region and the scribe line region to a predetermined depth using a plasma etching process, second etching the passivation dielectric layer to expose the metal pad and the test pad, forming a bump on the metal pad, and dicing the substrate while removing the scribe line region by mechanical sawing.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 18, 2024
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Jin Won JEONG, Jang Hee LEE, Young Hun JUN, Jong Woon LEE, Jae Sik CHOI
  • Publication number: 20240121385
    Abstract: The present invention relates to an intra prediction method and apparatus. The image decoding method according to the present invention may comprise decoding information on intra prediction; and generating a prediction block by performing intra prediction for a current block based on the information on intra prediction. The information on intra prediction may include information on an intra prediction mode, and the intra prediction mode may include a curved intra prediction mode.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Hyun Suk KO, Jin Ho LEE, Sung Chang LIM, Jung Won KANG, Ha Hyun LEE, Dong San JUN, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI
  • Patent number: 11943436
    Abstract: The present it relates to a video encoding/decoding method and apparatus. The video decoding method according to the present invention may comprise c coding filter information on a coding unit; classifying samples in the coding unit into classes on a per block classification unit basis; and filtering the coding unit having the samples classified into the classes on a per block classification unit basis by using the filter information.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: March 26, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung Chang Lim, Jung Won Kang, Ha Hyun Lee, Dong San Jun, Hyun Suk Ko, Jin Ho Lee, Hui Yong Kim
  • Patent number: 11943475
    Abstract: The present invention relates to an image encoding/decoding method and apparatus. The image decoding method according to the present invention may comprise configuring an MPM list based on intra-prediction modes of neighbor blocks of a current block and a number of frequencies of the intra-prediction modes of the neighbor blocks, deriving an intra-prediction mode of the current block based on the MPM list, and performing intra-prediction for the current block based on the intra-prediction mode.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: March 26, 2024
    Assignee: Intellectual Discovery Co., Ltd.
    Inventors: Hyun Suk Ko, Sung Chang Lim, Jung Won Kang, Jin Ho Lee, Ha Hyun Lee, Dong San Jun, Hui Yong Kim
  • Patent number: 11943447
    Abstract: Disclosed herein are a decoding method and apparatus and an encoding method and apparatus that perform inter-prediction using a motion vector predictor. For a candidate block in a col picture, a scaled motion vector is generated based on a motion vector of the candidate block. When the scaled motion vector indicates a target block, a motion vector predictor of the target block is generated based on the motion vector of the candidate block. The motion vector predictor is used to derive the motion vector of the target block in a specific inter-prediction mode such as a merge mode and an AMVP mode.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: March 26, 2024
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY-ACADEMIA COOPERATION GROUP OF SEJONG UNIVERSITY, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITY
    Inventors: Sung-Chang Lim, Jung-Won Kang, Hyunsuk Ko, Jin-Ho Lee, Ha-Hyun Lee, Dong-San Jun, Hui-Yong Kim, Yung-Lyul Lee, Nam-Uk Kim, Jae-Gon Kim
  • Publication number: 20240098311
    Abstract: The present invention relates to an image encoding/decoding method and apparatus. An image encoding method according to the present invention may comprise generating a transform block by performing at least one of transform and quantization; grouping at least one coefficient included in the transform block into at least one coefficient group (CG); scanning at least one coefficient included in the coefficient group; and encoding the at least one coefficient.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 21, 2024
    Applicants: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, INDUSTRY ACADEMY COOPERATION FOUNDATION OF SEJONG UNIVERSITY
    Inventors: Sung Chang LIM, Jung Won KANG, Hyun Suk KO, Jin Ho LEE, Dong San JUN, Ha Hyun LEE, Seung Hyun CHO, Hui Yong KIM, Jin Soo CHOI, Yung Lyul LEE, Jun Woo CHOI
  • Patent number: 11936853
    Abstract: The present invention relates to an image encoding method and an image decoding method. The image decoding method includes partitioning a picture into a plurality of coding units, constructing a coding unit group including at least one coding unit of the plurality of coding units, obtaining coding information in units of one coding unit group, and decoding at least one coding unit of the plurality of coding units included in the coding unit group by using the obtained coding information.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: March 19, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jung Won Kang, Sung Chang Lim, Hyun Suk Ko, Ha Hyun Lee, Jin Ho Lee, Dong San Jun, Seung Hyun Cho, Hui Yong Kim, Jin Soo Choi
  • Publication number: 20240080454
    Abstract: An image encoding/decoding method and apparatus for performing intra prediction mode based intra prediction are provided. An image decoding method may comprise decoding an intra prediction mode of a current block, deriving at least one intra prediction mode from the decoded intra prediction mode of the current block, generating two or more intra prediction blocks using the intra prediction mode of the current block and the derived intra prediction mode, and generating an intra prediction block of the current block based on the two or more intra prediction blocks.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Applicant: LX SEMICON CO., LTD.
    Inventors: Sung Chang LIM, Hyun Suk KO, Jung Won KANG, Jin Ho Lee, Ha Hyun LEE, Dong San Jun, Hui Yong KIM
  • Publication number: 20240080455
    Abstract: An image encoding/decoding method and apparatus for performing intra prediction mode based intra prediction are provided. An image decoding method may comprise decoding an intra prediction mode of a current block, deriving at least one intra prediction mode from the decoded intra prediction mode of the current block, generating two or more intra prediction blocks using the intra prediction mode of the current block and the derived intra prediction mode, and generating an intra prediction block of the current block based on the two or more intra prediction blocks.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Applicant: LX SEMICON CO., LTD.
    Inventors: Sung Chang LIM, Hyun Suk KO, Jung Won KANG, Jin Ho Lee, Ha Hyun LEE, Dong San Jun, Hui Yong KIM
  • Patent number: 11924412
    Abstract: An image encoding/decoding method and apparatus for performing representative sample-based intra prediction are provided. An image decoding method may comprise deriving an intra prediction mode of a current block, configuring a reference sample of the current block, and performing intra prediction for the current block based on the intra prediction mode and the reference sample, wherein the intra prediction is representative sample-based prediction.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: March 5, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jin Ho Lee, Jung Won Kang, Hyun Suk Ko, Sung Chang Lim, Ha Hyun Lee, Dong San Jun, Hui Yong Kim
  • Publication number: 20240073413
    Abstract: An image encoding/decoding method and apparatus for performing intra prediction using a plurality of reference sample lines are provided. An image decoding method may comprise configuring a plurality of reference sample lines, reconstructing an intra prediction mode of a current block, and performing intra prediction for the current block based on the intra prediction mode and the plurality of reference sample lines.
    Type: Application
    Filed: October 30, 2023
    Publication date: February 29, 2024
    Inventors: Jin Ho LEE, Jung Won KANG, Hyun Suk KO, Sung Chang LIM, Ha Hyun LEE, Dong San JUN, Hui Yong KIM
  • Patent number: 11917148
    Abstract: Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. In video encoding and decoding, multiple partition blocks are generated by splitting a target block. A prediction mode is derived for at least a part of the multiple partition blocks, among the multiple partition blocks, and prediction is performed on the multiple partition blocks based on the derived prediction mode. When prediction is performed on the partition blocks, information related to the target block may be used, and information related to an additional partition block, which is predicted prior to the partition block, may be used.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: February 27, 2024
    Assignees: Electronics And Telecommunications Research Institute, Industry-University Cooperation Foundation Korea Aerospace University, Hanbat National University Industry-Academic Cooperation Foundation
    Inventors: Jin-Ho Lee, Jung-Won Kang, Hyunsuk Ko, Sung-Chang Lim, Dong-San Jun, Ha-Hyun Lee, Seung-Hyun Cho, Hui-Yong Kim, Hae-Chul Choi, Dae-Hyeok Gwon, Jae-Gon Kim, A-Ram Back
  • Patent number: 7361565
    Abstract: In a method of forming a metal gate in a semiconductor device, a gate insulation pattern and a dummy gate pattern are formed on a substrate. An insulation interlayer is formed on the dummy gate pattern to cover the dummy gate pattern. The insulation interlayer is polished such that a top surface of the dummy gate pattern is exposed, and the dummy gate pattern is selectively removed to form a trench on the substrate. A gate spacer is formed on an inner sidewall of the trench for determining a gate length of the metal gate. A metal is deposited to a sufficient thickness to fill the trench to form a metal layer. The metal layer is polished to remain in the trench. Accordingly, the gate length of the metal gate may be reduced no more than the resolution limit of the photolithography exposing system.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Ho Shin, Jong-Hyon Ahn, Kong-Soo Cheong, Jin-Won Jun
  • Publication number: 20050158935
    Abstract: In a method of forming a metal gate in a semiconductor device, a gate insulation pattern and a dummy gate pattern are formed on a substrate. An insulation interlayer is formed on the dummy gate pattern to cover the dummy gate pattern. The insulation interlayer is polished such that a top surface of the dummy gate pattern is exposed, and the dummy gate pattern is selectively removed to form a trench on the substrate. A gate spacer is formed on an inner sidewall of the trench for determining a gate length of the metal gate. A metal is deposited to a sufficient thickness to fill the trench to form a metal layer. The metal layer is polished to remain in the trench. Accordingly, the gate length of the metal gate may be reduced no more than the resolution limit of the photolithography exposing system.
    Type: Application
    Filed: January 18, 2005
    Publication date: July 21, 2005
    Inventors: Jeong-Ho Shin, Jong-Hyon Ahn, Kong-Soo Cheong, Jin-Won Jun
  • Patent number: 6911397
    Abstract: A method of forming a dual damascene interconnection employs a low-k dielectric organic polymer as an insulating layer. With only one hard mask layer, ashing damage to the insulating layer is prevented using a hard mask layer and an etch-stop layer that are different in etch rate from that of a self-aligned spacer. Further, it is possible to form a via hole that is smaller than the resolution limit of the photolithographic process. As a result, the process is simplified and a photoresist tail phenomenon does not occur.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: June 28, 2005
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Jin-Won Jun, Young-Wug Kim, Tae-Soo Park, Kyung-Tae Lee
  • Patent number: 6878598
    Abstract: Provided is a method of forming a thick metal silicide layer on a gate electrode. The method includes forming a gate electrode of a transistor on a semiconductor substrate, wherein a hard mask is formed on the gate electrode, forming a spacer on a sidewall of the gate electrode, forming a first silicide layer on a portion of the semiconductor substrate, adjacent to the spacer, forming an insulating layer on the first suicide layer to expose upper portions of the hard mask and the spacer, selectively etching the exposed upper portions of the hard mask and the spacer using the insulating layer as an etch mask until the top surface and the sidewall of the gate electrode are exposed, forming a metal layer on the exposed top surface and sidewall of the gate electrode, and forming a second silicide layer on the gate electrode by siliciding the metal layer.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: April 12, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-won Jun, Kong-soo Cheong, Jeong-ho Shin
  • Publication number: 20040132274
    Abstract: Provided is a method of forming a thick metal silicide layer on a gate electrode. The method includes forming a gate electrode of a transistor on a semiconductor substrate, wherein a hard mask is formed on the gate electrode, forming a spacer on a sidewall of the gate electrode, forming a first silicide layer on a portion of the semiconductor substrate, adjacent to the spacer, forming an insulating layer on the first suicide layer to expose upper portions of the hard mask and the spacer, selectively etching the exposed upper portions of the hard mask and the spacer using the insulating layer as an etch mask until the top surface and the sidewall of the gate electrode are exposed, forming a metal layer on the exposed top surface and sidewall of the gate electrode, and forming a second silicide layer on the gate electrode by siliciding the metal layer.
    Type: Application
    Filed: December 9, 2003
    Publication date: July 8, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Won Jun, Kong-Soo Cheong, Jeong-Ho Shin