Abstract: In a plasma display, an address buffer board converts subfield data, transmitted by a differential method, into a driving voltage using a control signal transmitted by a Transistor-Transistor Logic (TTL) method and a clock signal, transmitted by a differential method, and supplies the driving voltage to an address electrode. The signal transmitted by the TTL method passes through a buffer, and the buffer has a delay value that varies depending on temperature. A controller delays a clock signal corresponding to delay value of the buffer, and generates a control signal from the delayed clock signal. In addition, the controller converts the generated control signal into a control signal of the TTL method and outputs the converted control signal to the address buffer board.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: In a plasma display, an address buffer board converts subfield data, transmitted by a differential method, into a driving voltage using a control signal transmitted by a Transistor-Transistor Logic (TTL) method and a clock signal, transmitted by a differential method, and supplies the driving voltage to an address electrode. The signal transmitted by the TTL method passes through a buffer, and the buffer has a delay value that varies depending on temperature. A controller delays a clock signal corresponding to delay value of the buffer, and generates a control signal from the delayed clock signal. In addition, the controller converts the generated control signal into a control signal of the TTL method and outputs the converted control signal to the address buffer board.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.