Abstract: A display device includes first and second light emitting regions; first and second pixel electrodes in the first and second light emitting regions, respectively; a first organic layer in the first light emitting region, including first and second light emitting layers; a second organic layer in the second light emitting region, including a third light emitting layer; a common electrode on the first and second organic layers; a wavelength conversion pattern on the common electrode, overlapping the first organic layer, and wavelength-converting light of a first color into light of a second color, different from the first color; and a light transmitting pattern on the common electrode, overlapping the second organic layer. The third light emitting layer and one of the first and second light emitting layers emit light of the first color, and another one of the first and second light emitting layers emits light of the second color.

Abstract: An operating method is disclosed for a dehydrogenation reaction system. The method includes providing a system having: an acid aqueous solution tank including an acid aqueous solution; a dehydrogenation reactor including a chemical hydride of a solid state and receiving an acid aqueous solution from the acid aqueous solution tank to react the chemical hydride with the acid aqueous solution to generate hydrogen; and a fuel cell stack receiving hydrogen generated from the dehydrogenation reactor to be reacted with oxygen to generate water and simultaneously to generate electrical energy. The method also includes recycling the water generated from the fuel cell stack to one or all of the acid aqueous solution tank, the dehydrogenation reactor, and a separate water tank. The acid is formic acid and, in in the dehydrogenation reactor, the temperature is in a range of 10° C. to 400° C. and the pressure is in a range of 1 bar to 100 bar.

Abstract: In a plasma display, an address buffer board converts subfield data, transmitted by a differential method, into a driving voltage using a control signal transmitted by a Transistor-Transistor Logic (TTL) method and a clock signal, transmitted by a differential method, and supplies the driving voltage to an address electrode. The signal transmitted by the TTL method passes through a buffer, and the buffer has a delay value that varies depending on temperature. A controller delays a clock signal corresponding to delay value of the buffer, and generates a control signal from the delayed clock signal. In addition, the controller converts the generated control signal into a control signal of the TTL method and outputs the converted control signal to the address buffer board.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.

Abstract: In a plasma display, an address buffer board converts subfield data, transmitted by a differential method, into a driving voltage using a control signal transmitted by a Transistor-Transistor Logic (TTL) method and a clock signal, transmitted by a differential method, and supplies the driving voltage to an address electrode. The signal transmitted by the TTL method passes through a buffer, and the buffer has a delay value that varies depending on temperature. A controller delays a clock signal corresponding to delay value of the buffer, and generates a control signal from the delayed clock signal. In addition, the controller converts the generated control signal into a control signal of the TTL method and outputs the converted control signal to the address buffer board.

Abstract: Disclosed is a PDP driving method having a misfiring erase period between reset and address periods. Large amounts of positive and negative charges are respectively formed on scan and sustain electrodes because of an unstable reset operation in the reset period. Because of the charges, discharging can occur between the scan and sustain electrodes in the sustain period even without addressing in the address period. In the misfiring erase period, a voltage is applied between the scan and sustain electrodes to generate discharging and respectively form negative and positive charges on the scan and sustain electrodes. An erase pulse is then applied to erase the negative and positive charges respectively formed on the scan and sustain electrodes.