Patents by Inventor Jin Wook Cho

Jin Wook Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12162646
    Abstract: A packing box according to an embodiment includes a lower body including a bottom portion and a lower wall portion extending upward from the bottom portion; and an upper body including a cover portion and an upper wall portion extending downward from the cover portion defining an inner space with the lower body in case that combined with the lower body. The upper wall portion includes at least one groove in which an edge portion of a display device is inserted, and the cover portion includes at least one opening abutting with the at least one groove.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: December 10, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Su-Young Yun, Sung Jin Joo, Ja Huem Koo, Jin-Wook Cho
  • Patent number: 11932473
    Abstract: A tray includes a bottom portion including a plurality of protrusion patterns and a sidewall portion protruded from the bottom portion. The sidewall portion includes a first side portion provided with a groove defined therein and extending from the bottom portion, an upper surface extending from the first side portion to a direction away from the bottom portion in a plan view, and a second side portion extending from the upper surface and facing the first side portion.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin-Wook Cho, Min-Yeob Kang, Nampyo Hong
  • Publication number: 20230339652
    Abstract: A packing box according to an embodiment includes a lower body including a bottom portion and a lower wall portion extending upward from the bottom portion; and an upper body including a cover portion and an upper wall portion extending downward from the cover portion defining an inner space with the lower body in case that combined with the lower body. The upper wall portion includes at least one groove in which an edge portion of a display device is inserted, and the cover portion includes at least one opening abutting with the at least one groove.
    Type: Application
    Filed: January 4, 2023
    Publication date: October 26, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: SU-YOUNG YUN, SUNG JIN JOO, Ja Huem KOO, JIN-WOOK CHO
  • Publication number: 20230242320
    Abstract: A tray includes a bottom portion including a plurality of protrusion patterns and a sidewall portion protruded from the bottom portion. The sidewall portion includes a first side portion provided with a groove defined therein and extending from the bottom portion, an upper surface extending from the first side portion to a direction away from the bottom portion in a plan view, and a second side portion extending from the upper surface and facing the first side portion.
    Type: Application
    Filed: October 27, 2022
    Publication date: August 3, 2023
    Inventors: JIN-WOOK CHO, MIN-YEOB KANG, NAMPYO HONG
  • Patent number: 11592611
    Abstract: A tray module includes a tray in which a plurality of display device components are alternately stackable with a plurality of protective sheets. Each of a protective sheet among the plurality of protective sheets includes: a first polymer layer including a first polymer resin which is foamed, and top and bottom surfaces opposite to each other; a second polymer layer on each of the top and bottom surfaces of the first polymer layer, the second polymer layer including a second polymer resin; and a paper layer defining an outer surface of the protective sheet.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: February 28, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin-wook Cho, Ja Huem Koo, Bo bae Sim, Sung jin Joo, Wonjun Choi
  • Publication number: 20200301063
    Abstract: A tray module includes a tray in which a plurality of display device components are alternately stackable with a plurality of protective sheets. Each of a protective sheet among the plurality of protective sheets includes: a first polymer layer including a first polymer resin which is foamed, and top and bottom surfaces opposite to each other; a second polymer layer on each of the top and bottom surfaces of the first polymer layer, the second polymer layer including a second polymer resin; and a paper layer defining an outer surface of the protective sheet.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 24, 2020
    Inventors: Jin-wook CHO, Ja Huem KOO, Bo bae SIM, Sung jin JOO, Wonjun CHOI
  • Patent number: 9676509
    Abstract: A tray for transferring a panel is disclosed. The tray includes a tray mold frame including acrylonitrile-butadiene-styrene (“ABS”) resin, a receiving member, a supporting member and a slot member. The tray mold frame includes four extrusion bars and four molding members. The molding members combine with the extrusion bars. Each of the molding members include a first protruding part on a side surface. The receiving member is disposed inside of the tray mold frame. The supporting member is disposed on a lower surface of the receiving member. The supporting member combines with the extrusion bars configured to support the receiving member. The slot member includes a first groove combining with the first protruding part. The slot member is disposed on the receiving member. Thus, when the panel is transferred by the tray, a fault of the panel during transferring may decrease.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: June 13, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sang-Kyo Shin, Seung-Gyu Ko, Heung-Seok Kim, Kyung-Hwan Jung, Jin-Wook Cho
  • Publication number: 20150151870
    Abstract: A tray for transferring a panel is disclosed. The tray includes a tray mold frame including acrylonitrile-butadiene-styrene (“ABS”) resin, a receiving member, a supporting member and a slot member. The tray mold frame includes four extrusion bars and four molding members. The molding members combine with the extrusion bars. Each of the molding members include a first protruding part on a side surface. The receiving member is disposed inside of the tray mold frame. The supporting member is disposed on a lower surface of the receiving member. The supporting member combines with the extrusion bars configured to support the receiving member. The slot member includes a first groove combining with the first protruding part. The slot member is disposed on the receiving member. Thus, when the panel is transferred by the tray, a fault of the panel during transferring may decrease.
    Type: Application
    Filed: April 24, 2014
    Publication date: June 4, 2015
    Applicant: Samsung Display Co., Ltd.
    Inventors: Sang-Kyo SHIN, Seung-Gyu KO, Heung-Seok KIM, Kyung-Hwan JUNG, Jin-Wook CHO
  • Patent number: 7413932
    Abstract: A power amplifier includes a substrate, a heat sink for dissipating heat, and a heterojunction bipolar transistor (HBT) disposed on the substrate. The HBT includes a collector, a base, and at least an emitter. The power amplifier further includes an emitter electrode directly connecting the heat sink and the emitter of the HBT. The emitter electrode is a flip-chip bump, and the heat sink is a metal layer that sandwiches the HBT with the substrate. Alternatively, the emitter electrode is a backside via that penetrates the substrate, and the heat sink is a metal layer, disposed on the substrate opposite the HBT.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: August 19, 2008
    Assignee: MediaTek Inc.
    Inventors: Jin Wook Cho, Hongxi Xue
  • Patent number: 7208778
    Abstract: A power amplifier includes a substrate, a heat sink for dissipating heat, and a heterojunction bipolar transistor (HBT) disposed on the substrate. The HBT includes a collector, a base, and at least an emitter. The power amplifier further includes an emitter electrode directly connecting the heat sink and the emitter of the HBT. The emitter electrode is a flip-chip bump, and the heat sink is a metal layer that sandwiches the HBT with the substrate. Alternatively, the emitter electrode is a backside via that penetrates the substrate, and the heat sink is a metal layer, disposed on the substrate opposite the HBT.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: April 24, 2007
    Assignee: Mediatek Incorporation
    Inventors: Jin Wook Cho, Hongxi Xue
  • Publication number: 20060279361
    Abstract: A power amplifier includes a substrate, a heat sink for dissipating heat, and a heterojunction bipolar transistor (HBT) disposed on the substrate. The HBT includes a collector, a base, and at least an emitter. The power amplifier further includes an emitter electrode directly connecting the heat sink and the emitter of the HBT. The emitter electrode is a flip-chip bump, and the heat sink is a metal layer that sandwiches the HBT with the substrate. Alternatively, the emitter electrode is a backside via that penetrates the substrate, and the heat sink is a metal layer, disposed on the substrate opposite the HBT.
    Type: Application
    Filed: August 7, 2006
    Publication date: December 14, 2006
    Inventors: Jin Wook Cho, Hongxi Xue
  • Publication number: 20050101057
    Abstract: A power amplifier includes a substrate, a heat sink for dissipating heat, and a heterojunction bipolar transistor (HBT) disposed on the substrate. The HBT includes a collector, a base, and at least an emitter. The power amplifier further includes an emitter electrode directly connecting the heat sink and the emitter of the HBT. The emitter electrode is a flip-chip bump, and the heat sink is a metal layer that sandwiches the HBT with the substrate. Alternatively, the emitter electrode is a backside via that penetrates the substrate, and the heat sink is a metal layer, disposed on the substrate opposite the HBT.
    Type: Application
    Filed: October 19, 2004
    Publication date: May 12, 2005
    Inventors: Jin Wook Cho, Hongxi Xue
  • Patent number: 6849478
    Abstract: A power amplifier includes a substrate, a heat sink for dissipating heat, and a heterojunction bipolar transistor (HBT) disposed on the substrate. The HBT includes a collector, a base, and at least an emitter. The power amplifier further includes an emitter electrode directly connecting the heat sink and the emitter of the HBT. The emitter electrode is a flip-chip bump, and the heat sink is a metal layer that sandwiches the HBT with the substrate. Alternatively, the emitter electrode is a backside via that penetrates the substrate, and the heat sink is a metal layer, disposed on the substrate opposite the HBT.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: February 1, 2005
    Assignee: Mediatek Incorporation
    Inventors: Jin Wook Cho, Hongxi Xue
  • Patent number: 6828861
    Abstract: A power amplifier integrated circuit includes a plurality ofheterojunction bipolar transistors having a plurality of bases, a plurality of ballast resistors, and a capacitor. Each ballast resistor is connected between a base of the transistors and a DC node to which a DC voltage is applied. The capacitor is connected between an RF node, which supplies an RF signal, and the plurality of bases of the transistors. The capacitor provides a distinct path for the RF input signal having a substantially high capacitance, so that the RF input signal does not suffer significant signal loss.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: December 7, 2004
    Assignee: Mediatek Incorporation
    Inventors: Jin Wook Cho, Hongxi Xue
  • Publication number: 20040164804
    Abstract: A power amplifier integrated circuit includes a plurality of heterojunction bipolar transistors having a plurality of bases, a plurality of ballast resistors, and a capacitor. Each ballast resistor is connected between a base of the transistor and a DC node to which a DC voltage is applied. The capacitor is connected between an RF node, which supplies an RF signal, and the plurality of bases of the transistors. The capacitor provides a distinct path for the RF input signal having a substantially high capacitance, so that the RF input signal does not suffer significant signal loss.
    Type: Application
    Filed: August 7, 2003
    Publication date: August 26, 2004
    Inventors: Jin Wook Cho, Hongxi Xue
  • Patent number: 6686801
    Abstract: A power amplifier integrated circuit includes a plurality of heterojunction bipolar transistors having a plurality of bases, a plurality of ballast resistors, and a capacitor. Each ballast resistor is connected between a base of the transistor and a DC node to which a DC voltage is applied. The capacitor is connected between an RF node, which supplies an RF signal, and the plurality of bases of the transistors. The capacitor provides a distinct path for the RF input signal having a substantially high capacitance, so that the RF input signal does not suffer significant signal loss.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: February 3, 2004
    Assignee: MediaTek Inc.
    Inventors: Jin Wook Cho, Hongxi Xue
  • Publication number: 20040017260
    Abstract: A power amplifier includes a substrate, a heat sink for dissipating heat, and a heterojunction bipolar transistor (HBT) disposed on the substrate. The HBT includes a collector, a base, and at least an emitter. The power amplifier further includes an emitter electrode directly connecting the heat sink and the emitter of the HBT. The emitter electrode is a flip-chip bump, and the heat sink is a metal layer that sandwiches the HBT with the substrate. Alternatively, the emitter electrode is a backside via that penetrates the substrate, and the heat sink is a metal layer, disposed on the substrate opposite the HBT.
    Type: Application
    Filed: July 23, 2002
    Publication date: January 29, 2004
    Inventors: Jin Wook Cho, Hongxi Xue
  • Publication number: 20040017259
    Abstract: A power amplifier integrated circuit includes a plurality of heterojunction bipolar transistors having a plurality of bases, a plurality of ballast resistors, and a capacitor. Each ballast resistor is connected between a base of the transistor and a DC node to which a DC voltage is applied. The capacitor is connected between an RF node, which supplies an RF signal, and the plurality of bases of the transistors. The capacitor provides a distinct path for the RF input signal having a substantially high capacitance, so that the RF input signal does not suffer significant signal loss.
    Type: Application
    Filed: July 23, 2002
    Publication date: January 29, 2004
    Inventors: Jin Wook Cho, Hongxi Xue